From: Zhang Xiantao <xiantao.zhang@intel.com>
With virtual EPT support, L1 hyerpvisor can use EPT hardware
for L2 guest's memory virtualization. In this way, L2 guest's
performance can be improved sharply. According to our testing,
some benchmarks can show > 5x performance gain.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Zhang Xiantao (11):
nestedhap: Change hostcr3 and p2m->cr3 to meaningful words
nestedhap: Change nested p2m's walker to vendor-specific
nested_ept: Implement guest ept's walker
nested_ept: Add permission check for success case
EPT: Make ept data structure or operations neutral
nEPT: Try to enable EPT paging for L2 guest.
nEPT: Sync PDPTR fields if L2 guest in PAE paging mode
nEPT: Use minimal permission for nested p2m.
nEPT: handle invept instruction from L1 VMM
nEPT: expost EPT capablity to L1 VMM
nVMX: Expose VPID capability to nested VMM.
xen/arch/x86/hvm/hvm.c | 7 +-
xen/arch/x86/hvm/svm/nestedsvm.c | 31 +++
xen/arch/x86/hvm/svm/svm.c | 3 +-
xen/arch/x86/hvm/vmx/vmcs.c | 2 +-
xen/arch/x86/hvm/vmx/vmx.c | 76 +++++---
xen/arch/x86/hvm/vmx/vvmx.c | 208 ++++++++++++++++++-
xen/arch/x86/mm/guest_walk.c | 12 +-
xen/arch/x86/mm/hap/Makefile | 1 +
xen/arch/x86/mm/hap/nested_ept.c | 345 +++++++++++++++++++++++++++++++
xen/arch/x86/mm/hap/nested_hap.c | 79 +++----
xen/arch/x86/mm/mm-locks.h | 2 +-
xen/arch/x86/mm/p2m-ept.c | 96 +++++++--
xen/arch/x86/mm/p2m.c | 44 +++--
xen/arch/x86/mm/shadow/multi.c | 2 +-
xen/include/asm-x86/guest_pt.h | 8 +
xen/include/asm-x86/hvm/hvm.h | 9 +-
xen/include/asm-x86/hvm/nestedhvm.h | 1 +
xen/include/asm-x86/hvm/svm/nestedsvm.h | 3 +
xen/include/asm-x86/hvm/vmx/vmcs.h | 31 ++-
xen/include/asm-x86/hvm/vmx/vmx.h | 6 +-
xen/include/asm-x86/hvm/vmx/vvmx.h | 29 +++-
xen/include/asm-x86/p2m.h | 17 +-
22 files changed, 859 insertions(+), 153 deletions(-)
create mode 100644 xen/arch/x86/mm/hap/nested_ept.c
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Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
With virtual EPT support, L1 hyerpvisor can use EPT hardware
for L2 guest's memory virtualization. In this way, L2 guest's
performance can be improved sharply. According to our testing,
some benchmarks can show > 5x performance gain.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Zhang Xiantao (11):
nestedhap: Change hostcr3 and p2m->cr3 to meaningful words
nestedhap: Change nested p2m's walker to vendor-specific
nested_ept: Implement guest ept's walker
nested_ept: Add permission check for success case
EPT: Make ept data structure or operations neutral
nEPT: Try to enable EPT paging for L2 guest.
nEPT: Sync PDPTR fields if L2 guest in PAE paging mode
nEPT: Use minimal permission for nested p2m.
nEPT: handle invept instruction from L1 VMM
nEPT: expost EPT capablity to L1 VMM
nVMX: Expose VPID capability to nested VMM.
xen/arch/x86/hvm/hvm.c | 7 +-
xen/arch/x86/hvm/svm/nestedsvm.c | 31 +++
xen/arch/x86/hvm/svm/svm.c | 3 +-
xen/arch/x86/hvm/vmx/vmcs.c | 2 +-
xen/arch/x86/hvm/vmx/vmx.c | 76 +++++---
xen/arch/x86/hvm/vmx/vvmx.c | 208 ++++++++++++++++++-
xen/arch/x86/mm/guest_walk.c | 12 +-
xen/arch/x86/mm/hap/Makefile | 1 +
xen/arch/x86/mm/hap/nested_ept.c | 345 +++++++++++++++++++++++++++++++
xen/arch/x86/mm/hap/nested_hap.c | 79 +++----
xen/arch/x86/mm/mm-locks.h | 2 +-
xen/arch/x86/mm/p2m-ept.c | 96 +++++++--
xen/arch/x86/mm/p2m.c | 44 +++--
xen/arch/x86/mm/shadow/multi.c | 2 +-
xen/include/asm-x86/guest_pt.h | 8 +
xen/include/asm-x86/hvm/hvm.h | 9 +-
xen/include/asm-x86/hvm/nestedhvm.h | 1 +
xen/include/asm-x86/hvm/svm/nestedsvm.h | 3 +
xen/include/asm-x86/hvm/vmx/vmcs.h | 31 ++-
xen/include/asm-x86/hvm/vmx/vmx.h | 6 +-
xen/include/asm-x86/hvm/vmx/vvmx.h | 29 +++-
xen/include/asm-x86/p2m.h | 17 +-
22 files changed, 859 insertions(+), 153 deletions(-)
create mode 100644 xen/arch/x86/mm/hap/nested_ept.c
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel