Mailing List Archive

# HG changeset patch
# User Ian Jackson <Ian.Jackson@eu.citrix.com>
# Date 1299690272 0
# Node ID 7ce181dd252d9bfca98358057e903b5f34000a52
# Parent 16aea83d4719d295828f6d1968b887d86a98920f
# Parent a378fbfa7219f87f953a8368f78db66d2c88a85a
Merge
---


diff -r 16aea83d4719 -r 7ce181dd252d xen/arch/x86/x86_emulate/x86_emulate.c
--- a/xen/arch/x86/x86_emulate/x86_emulate.c Wed Mar 09 17:04:13 2011 +0000
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c Wed Mar 09 17:04:32 2011 +0000
@@ -2667,35 +2667,35 @@
break;
default:
fail_if(modrm >= 0xc0);
- ea.bytes = 8;
+ ea.bytes = 4;
src = ea;
if ( (rc = ops->read(src.mem.seg, src.mem.off, &src.val,
src.bytes, ctxt)) != 0 )
goto done;
switch ( modrm_reg & 7 )
{
- case 0: /* fiadd m64i */
+ case 0: /* fiadd m32i */
emulate_fpu_insn_memsrc("fiaddl", src.val);
break;
- case 1: /* fimul m64i */
- emulate_fpu_insn_memsrc("fimul", src.val);
+ case 1: /* fimul m32i */
+ emulate_fpu_insn_memsrc("fimull", src.val);
break;
- case 2: /* ficom m64i */
+ case 2: /* ficom m32i */
emulate_fpu_insn_memsrc("ficoml", src.val);
break;
- case 3: /* ficomp m64i */
+ case 3: /* ficomp m32i */
emulate_fpu_insn_memsrc("ficompl", src.val);
break;
- case 4: /* fisub m64i */
+ case 4: /* fisub m32i */
emulate_fpu_insn_memsrc("fisubl", src.val);
break;
- case 5: /* fisubr m64i */
+ case 5: /* fisubr m32i */
emulate_fpu_insn_memsrc("fisubrl", src.val);
break;
- case 6: /* fidiv m64i */
+ case 6: /* fidiv m32i */
emulate_fpu_insn_memsrc("fidivl", src.val);
break;
- case 7: /* fidivr m64i */
+ case 7: /* fidivr m32i */
emulate_fpu_insn_memsrc("fidivrl", src.val);
break;
default:

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