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# HG changeset patch
# User kfraser@localhost.localdomain
# Date 1188496434 -3600
# Node ID 9554ec3e27cda80485b4ec4cc70516b9810f2fc8
# Parent d032a17aced2c240b384cedf3c3ddda37d604bbe
Support extensions to Intel architecture for TXT/SMX.
Signed-off-by: Joseph Cihula <joseph.cihula@intel.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
---
xen/arch/x86/domain_build.c | 1 +
xen/arch/x86/hvm/vmx/vmcs.c | 12 +++++++-----
xen/include/asm-x86/cpufeature.h | 1 +
xen/include/asm-x86/msr.h | 7 +++++--
xen/include/asm-x86/processor.h | 1 +
5 files changed, 15 insertions(+), 7 deletions(-)

diff -r d032a17aced2 -r 9554ec3e27cd xen/arch/x86/domain_build.c
--- a/xen/arch/x86/domain_build.c Thu Aug 30 16:41:57 2007 +0100
+++ b/xen/arch/x86/domain_build.c Thu Aug 30 18:53:54 2007 +0100
@@ -26,6 +26,7 @@
#include <asm/desc.h>
#include <asm/i387.h>
#include <asm/paging.h>
+#include <asm/e820.h>

#include <public/version.h>
#include <public/libelf.h>
diff -r d032a17aced2 -r 9554ec3e27cd xen/arch/x86/hvm/vmx/vmcs.c
--- a/xen/arch/x86/hvm/vmx/vmcs.c Thu Aug 30 16:41:57 2007 +0100
+++ b/xen/arch/x86/hvm/vmx/vmcs.c Thu Aug 30 18:53:54 2007 +0100
@@ -262,17 +262,19 @@ int vmx_cpu_up(void)

if ( eax & IA32_FEATURE_CONTROL_MSR_LOCK )
{
- if ( !(eax & IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON) )
+ if ( !(eax & (IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_OUTSIDE_SMX |
+ IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_INSIDE_SMX)) )
{
- printk("CPU%d: VMX disabled\n", cpu);
+ printk("CPU%d: VMX disabled by BIOS.\n", cpu);
return 0;
}
}
else
{
- wrmsr(IA32_FEATURE_CONTROL_MSR,
- IA32_FEATURE_CONTROL_MSR_LOCK |
- IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON, 0);
+ eax = (IA32_FEATURE_CONTROL_MSR_LOCK |
+ IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_OUTSIDE_SMX |
+ IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_INSIDE_SMX);
+ wrmsr(IA32_FEATURE_CONTROL_MSR, eax, 0);
}

vmx_init_vmcs_config();
diff -r d032a17aced2 -r 9554ec3e27cd xen/include/asm-x86/cpufeature.h
--- a/xen/include/asm-x86/cpufeature.h Thu Aug 30 16:41:57 2007 +0100
+++ b/xen/include/asm-x86/cpufeature.h Thu Aug 30 18:53:54 2007 +0100
@@ -77,6 +77,7 @@
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
#define X86_FEATURE_VMXE (4*32+ 5) /* Virtual Machine Extensions */
+#define X86_FEATURE_SMXE (4*32+ 6) /* Safer Mode Extensions */
#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_CID (4*32+10) /* Context ID */
diff -r d032a17aced2 -r 9554ec3e27cd xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Thu Aug 30 16:41:57 2007 +0100
+++ b/xen/include/asm-x86/msr.h Thu Aug 30 18:53:54 2007 +0100
@@ -122,8 +122,11 @@ static inline void wrmsrl(unsigned int m
#define MSR_IA32_VMX_CR4_FIXED1 0x489
#define MSR_IA32_VMX_PROCBASED_CTLS2 0x48b
#define IA32_FEATURE_CONTROL_MSR 0x3a
-#define IA32_FEATURE_CONTROL_MSR_LOCK 0x1
-#define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON 0x4
+#define IA32_FEATURE_CONTROL_MSR_LOCK 0x0001
+#define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_INSIDE_SMX 0x0002
+#define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_OUTSIDE_SMX 0x0004
+#define IA32_FEATURE_CONTROL_MSR_SENTER_PARAM_CTL 0x7f00
+#define IA32_FEATURE_CONTROL_MSR_ENABLE_SENTER 0x8000

/* AMD/K8 specific MSRs */
#define MSR_EFER 0xc0000080 /* extended feature register */
diff -r d032a17aced2 -r 9554ec3e27cd xen/include/asm-x86/processor.h
--- a/xen/include/asm-x86/processor.h Thu Aug 30 16:41:57 2007 +0100
+++ b/xen/include/asm-x86/processor.h Thu Aug 30 18:53:54 2007 +0100
@@ -80,6 +80,7 @@
#define X86_CR4_OSFXSR 0x0200 /* enable fast FPU save and restore */
#define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
#define X86_CR4_VMXE 0x2000 /* enable VMX */
+#define X86_CR4_SMXE 0x4000 /* enable SMX */

/*
* Trap/fault mnemonics.

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