Mailing List Archive

# HG changeset patch
# User awilliam@xenbuild.aw
# Node ID 7ae164a41569e747932180f5c63c4512d6dce8d4
# Parent fca97f3ab031ad8a6547c66a3beb67225061a578
[IA64] preparation for vga acceleration of VTI domain

This patch fixes several minor issues, as a prepare step to support VGA
acceleration for VTI domain:

- shared vram buffer needs to be mapped as WB in both sides, because
the shared vram is the true WB memory though VTI domain is told as UC
- Introduced a new pte_mem to indicate p2m entry containing valid mfn
when replace p2m entry. Pte_none doesn't work for VTI case, since IO
type is encoded into p2m entry which however doesn't contain valid mfn.

After above change, guest_physmap_add/remove_page is available to
be used by qemu to setup linear buffer for VTI domain.

Signed-off-by Kevin Tian <kevin.tian@intel.com>
---
xen/arch/ia64/vmx/vmmu.c | 12 ++++++++++++
xen/arch/ia64/xen/domain.c | 2 +-
xen/include/asm-ia64/linux-xen/asm/pgtable.h | 4 ++++
xen/include/asm-ia64/shadow.h | 6 ++++--
4 files changed, 21 insertions(+), 3 deletions(-)

diff -r fca97f3ab031 -r 7ae164a41569 xen/arch/ia64/vmx/vmmu.c
--- a/xen/arch/ia64/vmx/vmmu.c Tue May 30 10:32:42 2006 -0600
+++ b/xen/arch/ia64/vmx/vmmu.c Wed May 31 11:27:50 2006 -0600
@@ -356,6 +356,7 @@ IA64FAULT vmx_vcpu_itc_i(VCPU *vcpu, UIN

IA64FAULT vmx_vcpu_itc_d(VCPU *vcpu, UINT64 pte, UINT64 itir, UINT64 ifa)
{
+ u64 gpfn;
#ifdef VTLB_DEBUG
int slot;
u64 ps, va;
@@ -368,6 +369,17 @@ IA64FAULT vmx_vcpu_itc_d(VCPU *vcpu, UIN
return IA64_FAULT;
}
#endif //VTLB_DEBUG
+ gpfn = (pte & _PAGE_PPN_MASK)>> PAGE_SHIFT;
+ if (VMX_DOMAIN(vcpu)) {
+ if (__gpfn_is_io(vcpu->domain, gpfn))
+ pte |= VTLB_PTE_IO;
+ else
+ /* Ensure WB attribute if pte is related to a normal mem page,
+ * which is required by vga acceleration since qemu maps shared
+ * vram buffer with WB.
+ */
+ pte &= ~_PAGE_MA_MASK;
+ }
thash_purge_and_insert(vcpu, pte, itir, ifa);
return IA64_NO_FAULT;

diff -r fca97f3ab031 -r 7ae164a41569 xen/arch/ia64/xen/domain.c
--- a/xen/arch/ia64/xen/domain.c Tue May 30 10:32:42 2006 -0600
+++ b/xen/arch/ia64/xen/domain.c Wed May 31 11:27:50 2006 -0600
@@ -1181,7 +1181,7 @@ assign_domain_page_replace(struct domain
// update pte
npte = pfn_pte(mfn, __pgprot(__DIRTY_BITS | _PAGE_PL_2 | arflags));
old_pte = ptep_xchg(mm, mpaddr, pte, npte);
- if (!pte_none(old_pte)) {
+ if (pte_mem(old_pte)) {
unsigned long old_mfn;
struct page_info* old_page;

diff -r fca97f3ab031 -r 7ae164a41569 xen/include/asm-ia64/linux-xen/asm/pgtable.h
--- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h Tue May 30 10:32:42 2006 -0600
+++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h Wed May 31 11:27:50 2006 -0600
@@ -277,6 +277,10 @@ ia64_phys_addr_valid (unsigned long addr
#define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0)
#define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0)
#define pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0)
+#ifdef XEN
+#define pte_mem(pte) \
+ (!(pte_val(pte) & (GPFN_IO_MASK | GPFN_INV_MASK)) && !pte_none(pte))
+#endif
/*
* Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the
* access rights:
diff -r fca97f3ab031 -r 7ae164a41569 xen/include/asm-ia64/shadow.h
--- a/xen/include/asm-ia64/shadow.h Tue May 30 10:32:42 2006 -0600
+++ b/xen/include/asm-ia64/shadow.h Wed May 31 11:27:50 2006 -0600
@@ -37,9 +37,11 @@

#define shadow_mode_translate(d) (1)

-// for granttab transfer. XENMEM_populate_physmap
+/*
+ * Utilities to change relationship of gpfn->mfn for designated domain,
+ * which is required by gnttab transfer, balloon, device model and etc.
+ */
void guest_physmap_add_page(struct domain *d, unsigned long gpfn, unsigned long mfn);
-// for balloon driver. XENMEM_decrease_reservation
void guest_physmap_remove_page(struct domain *d, unsigned long gpfn, unsigned long mfn);
#endif


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