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# HG changeset patch
# User awilliam@xenbuild.aw
# Node ID 2ff0ade58aabe13f68675c76c76e34b4685438f2
# Parent b9a76893a1eeadfef7709d5ec0c0a12dcf520274
[IA64] declaration of metaphysical_rr

I'm making a patch for domain destruction.
While I tested my patch by repeatedly
creating/destructing domains,
a reserved register/field fault occurred in load_region_regs().

The cause of this fault is rr0 value overflow(0xFFFFFFFF********)
because metaphysical_rr0 in the arch_domain struct is
declared as integer (should be unsigned long).
The attached patch fixes the problem.

Signed-off-by: Masaki Kanno <kanno.masaki@jp.fujitsu.com>

diff -r b9a76893a1ee -r 2ff0ade58aab xen/arch/ia64/xen/hyperprivop.S
--- a/xen/arch/ia64/xen/hyperprivop.S Fri Feb 17 21:34:17 2006
+++ b/xen/arch/ia64/xen/hyperprivop.S Fri Feb 17 21:42:02 2006
@@ -1336,7 +1336,7 @@
movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
ld8 r22=[r22];;
adds r22=IA64_VCPU_META_SAVED_RR0_OFFSET,r22;;
- ld4 r23=[r22];;
+ ld8 r23=[r22];;
mov rr[r0]=r23;;
srlz.i;;
st4 [r20]=r0 ;;
@@ -1372,7 +1372,7 @@
movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
ld8 r22=[r22];;
adds r22=IA64_VCPU_META_RR0_OFFSET,r22;;
- ld4 r23=[r22];;
+ ld8 r23=[r22];;
mov rr[r0]=r23;;
srlz.i;;
adds r21=1,r0 ;;
@@ -1733,7 +1733,7 @@
dep r23=r28,r23,16,8;;
dep r23=r29,r23,8,8
cmp.eq p6,p0=r25,r0;; // if rr0, save for metaphysical
-(p6) st4 [r24]=r23
+(p6) st8 [r24]=r23
mov rr[r8]=r23;;
// done, mosey on back
1: mov r24=cr.ipsr
diff -r b9a76893a1ee -r 2ff0ade58aab xen/include/asm-ia64/domain.h
--- a/xen/include/asm-ia64/domain.h Fri Feb 17 21:34:17 2006
+++ b/xen/include/asm-ia64/domain.h Fri Feb 17 21:42:02 2006
@@ -15,8 +15,8 @@
struct arch_domain {
struct mm_struct *active_mm;
struct mm_struct *mm;
- int metaphysical_rr0;
- int metaphysical_rr4;
+ unsigned long metaphysical_rr0;
+ unsigned long metaphysical_rr4;
int starting_rid; /* first RID assigned to domain */
int ending_rid; /* one beyond highest RID assigned to domain */
int rid_bits; /* number of virtual rid bits (default: 18) */
@@ -61,10 +61,10 @@
unsigned long xen_timer_interval;
#endif
mapped_regs_t *privregs; /* save the state of vcpu */
- int metaphysical_rr0; // from arch_domain (so is pinned)
- int metaphysical_rr4; // from arch_domain (so is pinned)
- int metaphysical_saved_rr0; // from arch_domain (so is pinned)
- int metaphysical_saved_rr4; // from arch_domain (so is pinned)
+ unsigned long metaphysical_rr0; // from arch_domain (so is pinned)
+ unsigned long metaphysical_rr4; // from arch_domain (so is pinned)
+ unsigned long metaphysical_saved_rr0; // from arch_domain (so is pinned)
+ unsigned long metaphysical_saved_rr4; // from arch_domain (so is pinned)
int breakimm; // from arch_domain (so is pinned)
int starting_rid; /* first RID assigned to domain */
int ending_rid; /* one beyond highest RID assigned to domain */

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