ChangeSet 1.1389.23.3, 2005/05/18 14:19:06-07:00, adsharma@linux-t08.sc.intel.com
ptrace.h, pal.h, ia64regs.h, gcc_intrin.h, entry.h:
These CONFIG_VTI cp_patch files should have been checked in as patches.
b/xen/arch/ia64/patch/linux-2.6.11/entry.h | 21
b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/pal.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/ptrace.h | 15
xen/arch/ia64/entry.h | 97 -
xen/include/asm-ia64/gcc_intrin.h | 657 ----------
xen/include/asm-ia64/ia64regs.h | 129 -
xen/include/asm-ia64/pal.h | 1567 ------------------------
xen/include/asm-ia64/ptrace.h | 341 -----
10 files changed, 60 insertions(+), 2791 deletions(-)
diff -Nru a/xen/arch/ia64/entry.h b/xen/arch/ia64/entry.h
--- a/xen/arch/ia64/entry.h 2005-05-23 12:03:59 -04:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,97 +0,0 @@
-#include <linux/config.h>
-
-/*
- * Preserved registers that are shared between code in ivt.S and
- * entry.S. Be careful not to step on these!
- */
-#define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */
-#define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */
-#define PRED_USER_STACK 3 /* returning to user-stacks? */
-#ifdef CONFIG_VTI
-#define PRED_EMUL 2 /* Need to save r4-r7 for inst emulation */
-#define PRED_NON_EMUL 3 /* No need to save r4-r7 for normal path */
-#define PRED_BN0 6 /* Guest is in bank 0 */
-#define PRED_BN1 7 /* Guest is in bank 1 */
-#endif // CONFIG_VTI
-#define PRED_SYSCALL 4 /* inside a system call? */
-#define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */
-
-#ifdef __ASSEMBLY__
-# define PASTE2(x,y) x##y
-# define PASTE(x,y) PASTE2(x,y)
-
-# define pLvSys PASTE(p,PRED_LEAVE_SYSCALL)
-# define pKStk PASTE(p,PRED_KERNEL_STACK)
-# define pUStk PASTE(p,PRED_USER_STACK)
-#ifdef CONFIG_VTI
-# define pEml PASTE(p,PRED_EMUL)
-# define pNonEml PASTE(p,PRED_NON_EMUL)
-# define pBN0 PASTE(p,PRED_BN0)
-# define pBN1 PASTE(p,PRED_BN1)
-#endif // CONFIG_VTI
-# define pSys PASTE(p,PRED_SYSCALL)
-# define pNonSys PASTE(p,PRED_NON_SYSCALL)
-#endif
-
-#define PT(f) (IA64_PT_REGS_##f##_OFFSET)
-#define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)
-#ifdef CONFIG_VTI
-#define VPD(f) (VPD_##f##_START_OFFSET)
-#endif // CONFIG_VTI
-
-#define PT_REGS_SAVES(off) \
- .unwabi 3, 'i'; \
- .fframe IA64_PT_REGS_SIZE+16+(off); \
- .spillsp rp, PT(CR_IIP)+16+(off); \
- .spillsp ar.pfs, PT(CR_IFS)+16+(off); \
- .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
- .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
- .spillsp pr, PT(PR)+16+(off);
-
-#define PT_REGS_UNWIND_INFO(off) \
- .prologue; \
- PT_REGS_SAVES(off); \
- .body
-
-#define SWITCH_STACK_SAVES(off) \
- .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
- .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
- .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
- .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
- .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
- .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \
- .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \
- .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \
- .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off); \
- .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off); \
- .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off); \
- .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off); \
- .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off); \
- .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \
- .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \
- .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off); \
- .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off); \
- .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \
- .spillsp @priunat,SW(AR_UNAT)+16+(off); \
- .spillsp ar.rnat,SW(AR_RNAT)+16+(off); \
- .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off); \
- .spillsp pr,SW(PR)+16+(off))
-
-#define DO_SAVE_SWITCH_STACK \
- movl r28=1f; \
- ;; \
- .fframe IA64_SWITCH_STACK_SIZE; \
- adds sp=-IA64_SWITCH_STACK_SIZE,sp; \
- mov.ret.sptk b7=r28,1f; \
- SWITCH_STACK_SAVES(0); \
- br.cond.sptk.many save_switch_stack; \
-1:
-
-#define DO_LOAD_SWITCH_STACK \
- movl r28=1f; \
- ;; \
- invala; \
- mov.ret.sptk b7=r28,1f; \
- br.cond.sptk.many load_switch_stack; \
-1: .restore sp; \
- adds sp=IA64_SWITCH_STACK_SIZE,sp
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/entry.h b/xen/arch/ia64/patch/linux-2.6.11/entry.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/entry.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,37 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/arch/ia64/kernel/entry.h 2005-03-01 23:38:07.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/arch/ia64/entry.h 2005-05-18 14:00:53.000000000 -0700
+@@ -7,6 +7,12 @@
+ #define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */
+ #define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */
+ #define PRED_USER_STACK 3 /* returning to user-stacks? */
++#ifdef CONFIG_VTI
++#define PRED_EMUL 2 /* Need to save r4-r7 for inst emulation */
++#define PRED_NON_EMUL 3 /* No need to save r4-r7 for normal path */
++#define PRED_BN0 6 /* Guest is in bank 0 */
++#define PRED_BN1 7 /* Guest is in bank 1 */
++#endif // CONFIG_VTI
+ #define PRED_SYSCALL 4 /* inside a system call? */
+ #define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */
+
+@@ -17,12 +23,21 @@
+ # define pLvSys PASTE(p,PRED_LEAVE_SYSCALL)
+ # define pKStk PASTE(p,PRED_KERNEL_STACK)
+ # define pUStk PASTE(p,PRED_USER_STACK)
++#ifdef CONFIG_VTI
++# define pEml PASTE(p,PRED_EMUL)
++# define pNonEml PASTE(p,PRED_NON_EMUL)
++# define pBN0 PASTE(p,PRED_BN0)
++# define pBN1 PASTE(p,PRED_BN1)
++#endif // CONFIG_VTI
+ # define pSys PASTE(p,PRED_SYSCALL)
+ # define pNonSys PASTE(p,PRED_NON_SYSCALL)
+ #endif
+
+ #define PT(f) (IA64_PT_REGS_##f##_OFFSET)
+ #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)
++#ifdef CONFIG_VTI
++#define VPD(f) (VPD_##f##_START_OFFSET)
++#endif // CONFIG_VTI
+
+ #define PT_REGS_SAVES(off) \
+ .unwabi 3, 'i'; \
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,69 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/include/asm-ia64/gcc_intrin.h 2005-03-01 23:38:08.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/include/asm-ia64/gcc_intrin.h 2005-05-18 14:00:53.000000000 -0700
+@@ -368,6 +368,66 @@
+ #define ia64_mf() asm volatile ("mf" ::: "memory")
+ #define ia64_mfa() asm volatile ("mf.a" ::: "memory")
+
++#ifdef CONFIG_VTI
++/*
++ * Flushrs instruction stream.
++ */
++#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
++
++#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
++
++#define ia64_get_rsc() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.rsc;;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_rsc(val) \
++ asm volatile ("mov ar.rsc=%0;;" :: "r"(val) : "memory")
++
++#define ia64_get_bspstore() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.bspstore;;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_bspstore(val) \
++ asm volatile ("mov ar.bspstore=%0;;" :: "r"(val) : "memory")
++
++#define ia64_get_rnat() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.rnat;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_rnat(val) \
++ asm volatile ("mov ar.rnat=%0;;" :: "r"(val) : "memory")
++
++#define ia64_ttag(addr) \
++({ \
++ __u64 ia64_intri_res; \
++ asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
++ ia64_intri_res; \
++})
++
++#define ia64_get_dcr() \
++({ \
++ __u64 result; \
++ asm volatile ("mov %0=cr.dcr" : "=r"(result) : ); \
++ result; \
++})
++
++#define ia64_set_dcr(val) \
++({ \
++ asm volatile ("mov cr.dcr=%0" :: "r"(val) ); \
++})
++
++#endif // CONFIG_VTI
++
++
+ #define ia64_invala() asm volatile ("invala" ::: "memory")
+
+ #define ia64_thash(addr) \
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,38 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/include/asm-ia64/ia64regs.h 2005-03-01 23:38:07.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/include/asm-ia64/ia64regs.h 2005-05-18 14:00:53.000000000 -0700
+@@ -87,6 +87,35 @@
+ #define _IA64_REG_CR_LRR0 4176
+ #define _IA64_REG_CR_LRR1 4177
+
++#ifdef CONFIG_VTI
++#define IA64_REG_CR_DCR 0
++#define IA64_REG_CR_ITM 1
++#define IA64_REG_CR_IVA 2
++#define IA64_REG_CR_PTA 8
++#define IA64_REG_CR_IPSR 16
++#define IA64_REG_CR_ISR 17
++#define IA64_REG_CR_IIP 19
++#define IA64_REG_CR_IFA 20
++#define IA64_REG_CR_ITIR 21
++#define IA64_REG_CR_IIPA 22
++#define IA64_REG_CR_IFS 23
++#define IA64_REG_CR_IIM 24
++#define IA64_REG_CR_IHA 25
++#define IA64_REG_CR_LID 64
++#define IA64_REG_CR_IVR 65
++#define IA64_REG_CR_TPR 66
++#define IA64_REG_CR_EOI 67
++#define IA64_REG_CR_IRR0 68
++#define IA64_REG_CR_IRR1 69
++#define IA64_REG_CR_IRR2 70
++#define IA64_REG_CR_IRR3 71
++#define IA64_REG_CR_ITV 72
++#define IA64_REG_CR_PMV 73
++#define IA64_REG_CR_CMCV 74
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ptrace.h, pal.h, ia64regs.h, gcc_intrin.h, entry.h:
These CONFIG_VTI cp_patch files should have been checked in as patches.
b/xen/arch/ia64/patch/linux-2.6.11/entry.h | 21
b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/pal.h | 8
b/xen/arch/ia64/patch/linux-2.6.11/ptrace.h | 15
xen/arch/ia64/entry.h | 97 -
xen/include/asm-ia64/gcc_intrin.h | 657 ----------
xen/include/asm-ia64/ia64regs.h | 129 -
xen/include/asm-ia64/pal.h | 1567 ------------------------
xen/include/asm-ia64/ptrace.h | 341 -----
10 files changed, 60 insertions(+), 2791 deletions(-)
diff -Nru a/xen/arch/ia64/entry.h b/xen/arch/ia64/entry.h
--- a/xen/arch/ia64/entry.h 2005-05-23 12:03:59 -04:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,97 +0,0 @@
-#include <linux/config.h>
-
-/*
- * Preserved registers that are shared between code in ivt.S and
- * entry.S. Be careful not to step on these!
- */
-#define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */
-#define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */
-#define PRED_USER_STACK 3 /* returning to user-stacks? */
-#ifdef CONFIG_VTI
-#define PRED_EMUL 2 /* Need to save r4-r7 for inst emulation */
-#define PRED_NON_EMUL 3 /* No need to save r4-r7 for normal path */
-#define PRED_BN0 6 /* Guest is in bank 0 */
-#define PRED_BN1 7 /* Guest is in bank 1 */
-#endif // CONFIG_VTI
-#define PRED_SYSCALL 4 /* inside a system call? */
-#define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */
-
-#ifdef __ASSEMBLY__
-# define PASTE2(x,y) x##y
-# define PASTE(x,y) PASTE2(x,y)
-
-# define pLvSys PASTE(p,PRED_LEAVE_SYSCALL)
-# define pKStk PASTE(p,PRED_KERNEL_STACK)
-# define pUStk PASTE(p,PRED_USER_STACK)
-#ifdef CONFIG_VTI
-# define pEml PASTE(p,PRED_EMUL)
-# define pNonEml PASTE(p,PRED_NON_EMUL)
-# define pBN0 PASTE(p,PRED_BN0)
-# define pBN1 PASTE(p,PRED_BN1)
-#endif // CONFIG_VTI
-# define pSys PASTE(p,PRED_SYSCALL)
-# define pNonSys PASTE(p,PRED_NON_SYSCALL)
-#endif
-
-#define PT(f) (IA64_PT_REGS_##f##_OFFSET)
-#define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)
-#ifdef CONFIG_VTI
-#define VPD(f) (VPD_##f##_START_OFFSET)
-#endif // CONFIG_VTI
-
-#define PT_REGS_SAVES(off) \
- .unwabi 3, 'i'; \
- .fframe IA64_PT_REGS_SIZE+16+(off); \
- .spillsp rp, PT(CR_IIP)+16+(off); \
- .spillsp ar.pfs, PT(CR_IFS)+16+(off); \
- .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
- .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
- .spillsp pr, PT(PR)+16+(off);
-
-#define PT_REGS_UNWIND_INFO(off) \
- .prologue; \
- PT_REGS_SAVES(off); \
- .body
-
-#define SWITCH_STACK_SAVES(off) \
- .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
- .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
- .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
- .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
- .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
- .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \
- .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \
- .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \
- .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off); \
- .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off); \
- .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off); \
- .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off); \
- .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off); \
- .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \
- .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \
- .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off); \
- .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off); \
- .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \
- .spillsp @priunat,SW(AR_UNAT)+16+(off); \
- .spillsp ar.rnat,SW(AR_RNAT)+16+(off); \
- .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off); \
- .spillsp pr,SW(PR)+16+(off))
-
-#define DO_SAVE_SWITCH_STACK \
- movl r28=1f; \
- ;; \
- .fframe IA64_SWITCH_STACK_SIZE; \
- adds sp=-IA64_SWITCH_STACK_SIZE,sp; \
- mov.ret.sptk b7=r28,1f; \
- SWITCH_STACK_SAVES(0); \
- br.cond.sptk.many save_switch_stack; \
-1:
-
-#define DO_LOAD_SWITCH_STACK \
- movl r28=1f; \
- ;; \
- invala; \
- mov.ret.sptk b7=r28,1f; \
- br.cond.sptk.many load_switch_stack; \
-1: .restore sp; \
- adds sp=IA64_SWITCH_STACK_SIZE,sp
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/entry.h b/xen/arch/ia64/patch/linux-2.6.11/entry.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/entry.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,37 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/arch/ia64/kernel/entry.h 2005-03-01 23:38:07.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/arch/ia64/entry.h 2005-05-18 14:00:53.000000000 -0700
+@@ -7,6 +7,12 @@
+ #define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */
+ #define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */
+ #define PRED_USER_STACK 3 /* returning to user-stacks? */
++#ifdef CONFIG_VTI
++#define PRED_EMUL 2 /* Need to save r4-r7 for inst emulation */
++#define PRED_NON_EMUL 3 /* No need to save r4-r7 for normal path */
++#define PRED_BN0 6 /* Guest is in bank 0 */
++#define PRED_BN1 7 /* Guest is in bank 1 */
++#endif // CONFIG_VTI
+ #define PRED_SYSCALL 4 /* inside a system call? */
+ #define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */
+
+@@ -17,12 +23,21 @@
+ # define pLvSys PASTE(p,PRED_LEAVE_SYSCALL)
+ # define pKStk PASTE(p,PRED_KERNEL_STACK)
+ # define pUStk PASTE(p,PRED_USER_STACK)
++#ifdef CONFIG_VTI
++# define pEml PASTE(p,PRED_EMUL)
++# define pNonEml PASTE(p,PRED_NON_EMUL)
++# define pBN0 PASTE(p,PRED_BN0)
++# define pBN1 PASTE(p,PRED_BN1)
++#endif // CONFIG_VTI
+ # define pSys PASTE(p,PRED_SYSCALL)
+ # define pNonSys PASTE(p,PRED_NON_SYSCALL)
+ #endif
+
+ #define PT(f) (IA64_PT_REGS_##f##_OFFSET)
+ #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)
++#ifdef CONFIG_VTI
++#define VPD(f) (VPD_##f##_START_OFFSET)
++#endif // CONFIG_VTI
+
+ #define PT_REGS_SAVES(off) \
+ .unwabi 3, 'i'; \
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/gcc_intrin.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,69 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/include/asm-ia64/gcc_intrin.h 2005-03-01 23:38:08.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/include/asm-ia64/gcc_intrin.h 2005-05-18 14:00:53.000000000 -0700
+@@ -368,6 +368,66 @@
+ #define ia64_mf() asm volatile ("mf" ::: "memory")
+ #define ia64_mfa() asm volatile ("mf.a" ::: "memory")
+
++#ifdef CONFIG_VTI
++/*
++ * Flushrs instruction stream.
++ */
++#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
++
++#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
++
++#define ia64_get_rsc() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.rsc;;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_rsc(val) \
++ asm volatile ("mov ar.rsc=%0;;" :: "r"(val) : "memory")
++
++#define ia64_get_bspstore() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.bspstore;;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_bspstore(val) \
++ asm volatile ("mov ar.bspstore=%0;;" :: "r"(val) : "memory")
++
++#define ia64_get_rnat() \
++({ \
++ unsigned long val; \
++ asm volatile ("mov %0=ar.rnat;" : "=r"(val) :: "memory"); \
++ val; \
++})
++
++#define ia64_set_rnat(val) \
++ asm volatile ("mov ar.rnat=%0;;" :: "r"(val) : "memory")
++
++#define ia64_ttag(addr) \
++({ \
++ __u64 ia64_intri_res; \
++ asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
++ ia64_intri_res; \
++})
++
++#define ia64_get_dcr() \
++({ \
++ __u64 result; \
++ asm volatile ("mov %0=cr.dcr" : "=r"(result) : ); \
++ result; \
++})
++
++#define ia64_set_dcr(val) \
++({ \
++ asm volatile ("mov cr.dcr=%0" :: "r"(val) ); \
++})
++
++#endif // CONFIG_VTI
++
++
+ #define ia64_invala() asm volatile ("invala" ::: "memory")
+
+ #define ia64_thash(addr) \
diff -Nru a/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/xen/arch/ia64/patch/linux-2.6.11/ia64regs.h 2005-05-23 12:03:59 -04:00
@@ -0,0 +1,38 @@
+--- /home/adsharma/disk2/xen-ia64/test3.bk/xen/../../linux-2.6.11/include/asm-ia64/ia64regs.h 2005-03-01 23:38:07.000000000 -0800
++++ /home/adsharma/disk2/xen-ia64/test3.bk/xen/include/asm-ia64/ia64regs.h 2005-05-18 14:00:53.000000000 -0700
+@@ -87,6 +87,35 @@
+ #define _IA64_REG_CR_LRR0 4176
+ #define _IA64_REG_CR_LRR1 4177
+
++#ifdef CONFIG_VTI
++#define IA64_REG_CR_DCR 0
++#define IA64_REG_CR_ITM 1
++#define IA64_REG_CR_IVA 2
++#define IA64_REG_CR_PTA 8
++#define IA64_REG_CR_IPSR 16
++#define IA64_REG_CR_ISR 17
++#define IA64_REG_CR_IIP 19
++#define IA64_REG_CR_IFA 20
++#define IA64_REG_CR_ITIR 21
++#define IA64_REG_CR_IIPA 22
++#define IA64_REG_CR_IFS 23
++#define IA64_REG_CR_IIM 24
++#define IA64_REG_CR_IHA 25
++#define IA64_REG_CR_LID 64
++#define IA64_REG_CR_IVR 65
++#define IA64_REG_CR_TPR 66
++#define IA64_REG_CR_EOI 67
++#define IA64_REG_CR_IRR0 68
++#define IA64_REG_CR_IRR1 69
++#define IA64_REG_CR_IRR2 70
++#define IA64_REG_CR_IRR3 71
++#define IA64_REG_CR_ITV 72
++#define IA64_REG_CR_PMV 73
++#define IA64_REG_CR_CMCV 74
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