Mailing List Archive

http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1767

Summary: Incorrect Error about "Non-Paged aligned MMIO BAR in PCI
Config Space" when attempting HW Passthrough to a VM.
Product: Xen
Version: unspecified
Platform: x86-64
URL: http://lxr.xensource.com/lxr/source/tools/python/xen/uti
l/pci.py#L1119
OS/Version: Linux-2.6
Status: NEW
Severity: blocker
Priority: P1
Component: Tools
AssignedTo: xen-bugs@lists.xensource.com
ReportedBy: paulamonson@gmail.com


The reason for this error is incorrect parsing of the PCI config space in the
file [root]/tools/python/xen/util/pci.py. It assumes ALL BARs registers are
32-bit even though most modern PCIe hardware supports 32-bit and 64-bit BARs.

The current code is arount line 1119 in the file inside the function
'detect_dev_info()':

while bar_addr <= PCI_BAR_5:
bar = self.pci_conf_read32(bar_addr)
if (bar & PCI_BAR_SPACE) == PCI_BAR_MEM:
bar = bar & PCI_BAR_MEM_MASK
bar = bar & ~PAGE_MASK
if bar != 0:
self.has_non_page_aligned_bar = True
break
bar_addr = bar_addr + 4

This is not checking for a 64 bit BAR in PCI config space. The correct code
should read:

while bar_addr <= PCI_BAR_5:
bar = self.pci_conf_read32(bar_addr)
if (bar & PCI_BAR_SPACE) == PCI_BAR_MEM:
if(bar & PCI_MEM_BAR_LOCATABLE) != 0: # 64-bit BAR
barpt2 = self.pci_conf_read32(bar_addr+4)
bar = (bar & PCI_BAR_MEM_MASK) + ((barpt2 & 0xffffffff) <<
32)
bar = bar & ~PAGE_MASK
if bar != 0:
self.has_non_page_aligned_bar = True
break
bar_addr = bar_addr + 8
else: # 32-bit BAR
bar = bar & PCI_BAR_MEM_MASK
bar = bar & ~PAGE_MASK
if bar != 0:
self.has_non_page_aligned_bar = True
break
bar_addr = bar_addr + 4
else:
bar_addr = bar_addr + 4

This bug blocks all HW using 64 bit BARs whose incorrectly parsed address is
not page aligned (appears randomly because not all HW will fail this test).


This may be related to bug #1359 and has been seen in Xen 3.3, 4.0, 4.1
installs.

Hope the information given helps! :)

BTW: I used the PCIe 3.0 Spec for reference.

Paul


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