Mailing List Archive

[PATCH 0/6] PCI-X/PCI-Express read control interfaces
This patch set adds hooks to set PCI-X max read request size
and PCI-Express read request size. It is important that this be a PCI
subsystem function rather than a per device hack. That way, the PCI
system quirks can be used if needed.

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Re: [PATCH 0/6] PCI-X/PCI-Express read control interfaces [ In reply to ]
On Fri, 2006-12-08 at 10:22 -0800, Stephen Hemminger wrote:
> This patch set adds hooks to set PCI-X max read request size
> and PCI-Express read request size. It is important that this be a PCI
> subsystem function rather than a per device hack. That way, the PCI
> system quirks can be used if needed.

Excellent, I've been needing that to work around bogus firmwares...

Ben.


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Re: [PATCH 0/6] PCI-X/PCI-Express read control interfaces [ In reply to ]
On Mon, 11 Dec 2006 14:48:32 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> On Fri, 2006-12-08 at 10:22 -0800, Stephen Hemminger wrote:
> > This patch set adds hooks to set PCI-X max read request size
> > and PCI-Express read request size. It is important that this be a PCI
> > subsystem function rather than a per device hack. That way, the PCI
> > system quirks can be used if needed.
>
> Excellent, I've been needing that to work around bogus firmwares...
>
> Ben.
>
>

I am thinking in the next revision of these of masking the distinction
between pci-x and pci express and just have:

pci_get_read_count
pci_get_max_read_count
pci_set_read_count



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Stephen Hemminger <shemminger@osdl.org>
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Re: [PATCH 0/6] PCI-X/PCI-Express read control interfaces [ In reply to ]
> I am thinking in the next revision of these of masking the distinction
> between pci-x and pci express and just have:
>
> pci_get_read_count
> pci_get_max_read_count
> pci_set_read_count

We absolutely need an arch hook though to limit the size. We need to
make sure we don't go over the capabilities of parent bridges,
especially the host bridge. P2P bridges and most PCIe host bridges can
be handled by generic code but pretty much no PCI-X host bridge, they'll
need an arch hook.

Ben.


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