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Hi,

I don’t know the exact RIB scale, if there is one, short of what available memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+ BGP prefixes with the BGP process consuming about 1.9GB of memory.

It won’t hold a full table in FIB. 350K max, protocol independent, depending on the prefix size.

SRD is implemented using table-policy.

> On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Dear,
>
> Can someone please confirm how many routes are supported in above model in
> both rib and fib?
>
> Also, I am not able to find table-map command for this router.
>
> Any suggestions?
>
> Regards,
>
> Vikas
> _______________________________________________
> cisco-nsp mailing list cisco-nsp@puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/

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Many thanks Jason for your quick response.

If possible please also confirm the rib/fib limits of ASR1002-HX.

I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
choose the best of the two options.

Regards,
Vikas

On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca> wrote:

> Hi,
>
> I don’t know the exact RIB scale, if there is one, short of what available
> memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+
> BGP prefixes with the BGP process consuming about 1.9GB of memory.
>
> It won’t hold a full table in FIB. 350K max, protocol independent,
> depending on the prefix size.
>
> SRD is implemented using table-policy.
>
> > On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
> >
> > Dear,
> >
> > Can someone please confirm how many routes are supported in above model
> in
> > both rib and fib?
> >
> > Also, I am not able to find table-map command for this router.
> >
> > Any suggestions?
> >
> > Regards,
> >
> > Vikas
> > _______________________________________________
> > cisco-nsp mailing list cisco-nsp@puck.nether.net
> > https://puck.nether.net/mailman/listinfo/cisco-nsp
> > archive at http://puck.nether.net/pipermail/cisco-nsp/
>
>
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I’m not as familiar with the ASR1002-HX, but what I’m pretty sure of is if you’re considering the ASR1002-HX for IGW, you may want to review Juniper’s MX204. It’s probably going to be slightly more expensive than a NCS540, but far less expensive than the ASR1002-HX, but overall it will be a much better bang for your buck as an IGW.

> On Jul 8, 2020, at 8:48 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Many thanks Jason for your quick response.
>
> If possible please also confirm the rib/fib limits of ASR1002-HX.
>
> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to choose the best of the two options.
>
> Regards,
> Vikas
>
> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca <mailto:jason@lixfeld.ca>> wrote:
> Hi,
>
> I don’t know the exact RIB scale, if there is one, short of what available memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+ BGP prefixes with the BGP process consuming about 1.9GB of memory.
>
> It won’t hold a full table in FIB. 350K max, protocol independent, depending on the prefix size.
>
> SRD is implemented using table-policy.
>
> > On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com <mailto:vikassharmas@gmail.com>> wrote:
> >
> > Dear,
> >
> > Can someone please confirm how many routes are supported in above model in
> > both rib and fib?
> >
> > Also, I am not able to find table-map command for this router.
> >
> > Any suggestions?
> >
> > Regards,
> >
> > Vikas
> > _______________________________________________
> > cisco-nsp mailing list cisco-nsp@puck.nether.net <mailto:cisco-nsp@puck.nether.net>
> > https://puck.nether.net/mailman/listinfo/cisco-nsp <https://puck.nether.net/mailman/listinfo/cisco-nsp>
> > archive at http://puck.nether.net/pipermail/cisco-nsp/ <http://puck.nether.net/pipermail/cisco-nsp/>
>

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Vikas,

First of all, NCS 540 ACC-SYS has 16GB of RAM.

For NCS 540, slide 43:
https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf <https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf>

Essentially, around 380k depending on prefix distribution.

For ASR 1002-HX it’s here:
https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling <https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling>

Please use your favorite search engine first in future.

—
./

> On 9 Jul 2020, at 02:48, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Many thanks Jason for your quick response.
>
> If possible please also confirm the rib/fib limits of ASR1002-HX.
>
> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
> choose the best of the two options.
>
> Regards,
> Vikas
>
> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca> wrote:
>
>> Hi,
>>
>> I don’t know the exact RIB scale, if there is one, short of what available
>> memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+
>> BGP prefixes with the BGP process consuming about 1.9GB of memory.
>>
>> It won’t hold a full table in FIB. 350K max, protocol independent,
>> depending on the prefix size.
>>
>> SRD is implemented using table-policy.
>>
>>> On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>>>
>>> Dear,
>>>
>>> Can someone please confirm how many routes are supported in above model
>> in
>>> both rib and fib?
>>>
>>> Also, I am not able to find table-map command for this router.
>>>
>>> Any suggestions?
>>>
>>> Regards,
>>>
>>> Vikas
>>> _______________________________________________
>>> cisco-nsp mailing list cisco-nsp@puck.nether.net
>>> https://puck.nether.net/mailman/listinfo/cisco-nsp
>>> archive at http://puck.nether.net/pipermail/cisco-nsp/
>>
>>
> _______________________________________________
> cisco-nsp mailing list cisco-nsp@puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/

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Many thanks Jason.

Regards,
Vikas

On Thu, 9 Jul, 2020, 6:39 am Jason Lixfeld, <jason@lixfeld.ca> wrote:

> I’m not as familiar with the ASR1002-HX, but what I’m pretty sure of is if
> you’re considering the ASR1002-HX for IGW, you may want to review Juniper’s
> MX204. It’s probably going to be slightly more expensive than a NCS540,
> but far less expensive than the ASR1002-HX, but overall it will be a much
> better bang for your buck as an IGW.
>
> On Jul 8, 2020, at 8:48 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Many thanks Jason for your quick response.
>
> If possible please also confirm the rib/fib limits of ASR1002-HX.
>
> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
> choose the best of the two options.
>
> Regards,
> Vikas
>
> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca> wrote:
>
>> Hi,
>>
>> I don’t know the exact RIB scale, if there is one, short of what
>> available memory will hold. That said, it’s got 8GB of memory, and I’ve
>> seen 1.7M+ BGP prefixes with the BGP process consuming about 1.9GB of
>> memory.
>>
>> It won’t hold a full table in FIB. 350K max, protocol independent,
>> depending on the prefix size.
>>
>> SRD is implemented using table-policy.
>>
>> > On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com>
>> wrote:
>> >
>> > Dear,
>> >
>> > Can someone please confirm how many routes are supported in above model
>> in
>> > both rib and fib?
>> >
>> > Also, I am not able to find table-map command for this router.
>> >
>> > Any suggestions?
>> >
>> > Regards,
>> >
>> > Vikas
>> > _______________________________________________
>> > cisco-nsp mailing list cisco-nsp@puck.nether.net
>> > https://puck.nether.net/mailman/listinfo/cisco-nsp
>> > archive at http://puck.nether.net/pipermail/cisco-nsp/
>>
>>
>
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> On Jul 8, 2020, at 9:14 PM, ?ukasz Bromirski <lukasz@bromirski.net> wrote:
>
> Vikas,
>
> First of all, NCS 540 ACC-SYS has 16GB of RAM.

… but only 8GB available to the RP.

RP/0/RP0/CPU0:ncs540-7.lab#show memory summary
Wed Jul 8 21:19:33.842 EDT

node: node0_RP0_CPU0
------------------------------------------------------------------

Physical Memory: 8192M total (5333M available)
Application Memory : 8192M (5333M available)
Image: 4M (bootram: 0M)
Reserved: 0M, IOMem: 0M, flashfsys: 0M
Total shared window: 410M

RP/0/RP0/CPU0:ncs540-7.lab#show platform
Wed Jul 8 21:20:04.260 EDT
Node Type State Config state
--------------------------------------------------------------------------------
0/RP0/CPU0 N540-ACC-SYS(Active) IOS XR RUN NSHUT
0/RP0/NPU0 Slice UP
0/FT0 N540-FAN OPERATIONAL NSHUT
0/FT1 N540-FAN OPERATIONAL NSHUT
0/FT2 N540-FAN OPERATIONAL NSHUT
0/FT3 N540-FAN OPERATIONAL NSHUT
0/PM0 N540-PWR400-D OPERATIONAL NSHUT
0/PM1 N540-PWR400-D FAILED NSHUT
RP/0/RP0/CPU0:ncs540-7.lab#

>
> For NCS 540, slide 43:
> https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf <https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf>
>
> Essentially, around 380k depending on prefix distribution.
>
> For ASR 1002-HX it’s here:
> https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling <https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling>
>
> Please use your favorite search engine first in future.
>
> —
> ./
>
>> On 9 Jul 2020, at 02:48, Vikas Sharma <vikassharmas@gmail.com <mailto:vikassharmas@gmail.com>> wrote:
>>
>> Many thanks Jason for your quick response.
>>
>> If possible please also confirm the rib/fib limits of ASR1002-HX.
>>
>> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
>> choose the best of the two options.
>>
>> Regards,
>> Vikas
>>
>> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca <mailto:jason@lixfeld.ca>> wrote:
>>
>>> Hi,
>>>
>>> I don’t know the exact RIB scale, if there is one, short of what available
>>> memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+
>>> BGP prefixes with the BGP process consuming about 1.9GB of memory.
>>>
>>> It won’t hold a full table in FIB. 350K max, protocol independent,
>>> depending on the prefix size.
>>>
>>> SRD is implemented using table-policy.
>>>
>>>> On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com <mailto:vikassharmas@gmail.com>> wrote:
>>>>
>>>> Dear,
>>>>
>>>> Can someone please confirm how many routes are supported in above model
>>> in
>>>> both rib and fib?
>>>>
>>>> Also, I am not able to find table-map command for this router.
>>>>
>>>> Any suggestions?
>>>>
>>>> Regards,
>>>>
>>>> Vikas
>>>> _______________________________________________
>>>> cisco-nsp mailing list cisco-nsp@puck.nether.net <mailto:cisco-nsp@puck.nether.net>
>>>> https://puck.nether.net/mailman/listinfo/cisco-nsp <https://puck.nether.net/mailman/listinfo/cisco-nsp>
>>>> archive at http://puck.nether.net/pipermail/cisco-nsp/
>>>
>>>
>> _______________________________________________
>> cisco-nsp mailing list cisco-nsp@puck.nether.net <mailto:cisco-nsp@puck.nether.net>
>> https://puck.nether.net/mailman/listinfo/cisco-nsp <https://puck.nether.net/mailman/listinfo/cisco-nsp>
>> archive at http://puck.nether.net/pipermail/cisco-nsp/
>

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Dear Luka,

Thanks for your revert. I have checked all ciscolive presentation before I
have shooted question to the forum. I understand, LPM and LEM along with
iTCAM support on C 540 does not exceed 400k but I was not getting details
on rib/fib on ASR 1002-HX, in case you have found, please share with me.

Also, processing power of ASR vs C 540 is very different, one with quard
core 1.2 GHz and another with 2.5 GHz, so I was also wondering if BGP
scanner process will be good with which. If 540 can take care of scanning
process!!

Also internet does not inform about table-map (atleast, I couldn't find),
on C 540, many thanks to Jason for details provided.

Anyway, many thanks for the kind revert.

Regards,
Vikas

On Thu, 9 Jul, 2020, 6:44 am ?ukasz Bromirski, <lukasz@bromirski.net> wrote:

> Vikas,
>
> First of all, NCS 540 ACC-SYS has 16GB of RAM.
>
> For NCS 540, slide 43:
>
> https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf
>
> Essentially, around 380k depending on prefix distribution.
>
> For ASR 1002-HX it’s here:
>
> https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling
>
> Please use your favorite search engine first in future.
>
> —
> ./
>
> On 9 Jul 2020, at 02:48, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Many thanks Jason for your quick response.
>
> If possible please also confirm the rib/fib limits of ASR1002-HX.
>
> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
> choose the best of the two options.
>
> Regards,
> Vikas
>
> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca> wrote:
>
> Hi,
>
> I don’t know the exact RIB scale, if there is one, short of what available
> memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+
> BGP prefixes with the BGP process consuming about 1.9GB of memory.
>
> It won’t hold a full table in FIB. 350K max, protocol independent,
> depending on the prefix size.
>
> SRD is implemented using table-policy.
>
> On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Dear,
>
> Can someone please confirm how many routes are supported in above model
>
> in
>
> both rib and fib?
>
> Also, I am not able to find table-map command for this router.
>
> Any suggestions?
>
> Regards,
>
> Vikas
> _______________________________________________
> cisco-nsp mailing list cisco-nsp@puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/
>
>
>
> _______________________________________________
> cisco-nsp mailing list cisco-nsp@puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/
>
>
>
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Slight modification, I am looking for fib for ASR 1002-HX , RIB is
available.

Regards,
Vikas

On Thu, 9 Jul, 2020, 7:04 am Vikas Sharma, <vikassharmas@gmail.com> wrote:

> Dear Luka,
>
> Thanks for your revert. I have checked all ciscolive presentation before I
> have shooted question to the forum. I understand, LPM and LEM along with
> iTCAM support on C 540 does not exceed 400k but I was not getting details
> on rib/fib on ASR 1002-HX, in case you have found, please share with me.
>
> Also, processing power of ASR vs C 540 is very different, one with quard
> core 1.2 GHz and another with 2.5 GHz, so I was also wondering if BGP
> scanner process will be good with which. If 540 can take care of scanning
> process!!
>
> Also internet does not inform about table-map (atleast, I couldn't find),
> on C 540, many thanks to Jason for details provided.
>
> Anyway, many thanks for the kind revert.
>
> Regards,
> Vikas
>
> On Thu, 9 Jul, 2020, 6:44 am ?ukasz Bromirski, <lukasz@bromirski.net>
> wrote:
>
>> Vikas,
>>
>> First of all, NCS 540 ACC-SYS has 16GB of RAM.
>>
>> For NCS 540, slide 43:
>>
>> https://www.ciscolive.com/c/dam/r/ciscolive/emea/docs/2019/pdf/BRKSPG-2159.pdf
>>
>> Essentially, around 380k depending on prefix distribution.
>>
>> For ASR 1002-HX it’s here:
>>
>> https://www.cisco.com/c/en/us/products/collateral/routers/asr-1000-series-aggregation-services-routers/datasheet-c78-731640.html#PerformanceandScaling
>>
>> Please use your favorite search engine first in future.
>>
>> —
>> ./
>>
>> On 9 Jul 2020, at 02:48, Vikas Sharma <vikassharmas@gmail.com> wrote:
>>
>> Many thanks Jason for your quick response.
>>
>> If possible please also confirm the rib/fib limits of ASR1002-HX.
>>
>> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
>> choose the best of the two options.
>>
>> Regards,
>> Vikas
>>
>> On Thu, 9 Jul, 2020, 12:52 am Jason Lixfeld, <jason@lixfeld.ca> wrote:
>>
>> Hi,
>>
>> I don’t know the exact RIB scale, if there is one, short of what available
>> memory will hold. That said, it’s got 8GB of memory, and I’ve seen 1.7M+
>> BGP prefixes with the BGP process consuming about 1.9GB of memory.
>>
>> It won’t hold a full table in FIB. 350K max, protocol independent,
>> depending on the prefix size.
>>
>> SRD is implemented using table-policy.
>>
>> On Jul 8, 2020, at 3:02 PM, Vikas Sharma <vikassharmas@gmail.com> wrote:
>>
>> Dear,
>>
>> Can someone please confirm how many routes are supported in above model
>>
>> in
>>
>> both rib and fib?
>>
>> Also, I am not able to find table-map command for this router.
>>
>> Any suggestions?
>>
>> Regards,
>>
>> Vikas
>> _______________________________________________
>> cisco-nsp mailing list cisco-nsp@puck.nether.net
>> https://puck.nether.net/mailman/listinfo/cisco-nsp
>> archive at http://puck.nether.net/pipermail/cisco-nsp/
>>
>>
>>
>> _______________________________________________
>> cisco-nsp mailing list cisco-nsp@puck.nether.net
>> https://puck.nether.net/mailman/listinfo/cisco-nsp
>> archive at http://puck.nether.net/pipermail/cisco-nsp/
>>
>>
>>
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Hi,

On Thu, Jul 09, 2020 at 07:04:13AM +0530, Vikas Sharma wrote:
> Also, processing power of ASR vs C 540 is very different, one with quard
> core 1.2 GHz and another with 2.5 GHz, so I was also wondering if BGP
> scanner process will be good with which. If 540 can take care of scanning
> process!!

BGP scanner process died like 10 years ago...

gert
--
"If was one thing all people took for granted, was conviction that if you
feed honest figures into a computer, honest figures come out. Never doubted
it myself till I met a computer with a sense of humor."
Robert A. Heinlein, The Moon is a Harsh Mistress

Gert Doering - Munich, Germany gert@greenie.muc.de

I am not sure if all hardware support hierarchical FIB as this is hardware
base feature. Yes, if H-FIB is supported, BGP PIC will be used. If not,
then !!!

Regards,
Vikas

On Thu, 9 Jul, 2020, 11:35 am Gert Doering, <gert@greenie.muc.de> wrote:

> Hi,
>
> On Thu, Jul 09, 2020 at 07:04:13AM +0530, Vikas Sharma wrote:
> > Also, processing power of ASR vs C 540 is very different, one with quard
> > core 1.2 GHz and another with 2.5 GHz, so I was also wondering if BGP
> > scanner process will be good with which. If 540 can take care of scanning
> > process!!
>
> BGP scanner process died like 10 years ago...
>
> gert
> --
> "If was one thing all people took for granted, was conviction that if you
> feed honest figures into a computer, honest figures come out. Never
> doubted
> it myself till I met a computer with a sense of humor."
> Robert A. Heinlein, The Moon is a Harsh
> Mistress
>
> Gert Doering - Munich, Germany
> gert@greenie.muc.de
>
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On 8/Jul/20 21:22, Jason Lixfeld wrote:

> SRD is implemented using table-policy.

Gosh, it's been a while. Didn't realize the name changed. It used to be
BGP-SD (BGP Selective Download).

I suppose SRD was to make it protocol independent.

I've never used SRD on IOS XR, but judging by what I see for the
NCS5500, it seems to be meant to decide whether routes are downloaded to
high or low scale line cards. Can anyone clarify?

Classic BGP-SD simply doesn't download those routes to any FIB, regardless.

Mark.
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On 9/Jul/20 02:48, Vikas Sharma wrote:
> Many thanks Jason for your quick response.
>
> If possible please also confirm the rib/fib limits of ASR1002-HX.
>
> I have two choices to be used as IGW, ASR1002-HX or C 540 X and I want to
> choose the best of the two options.

If the -HX licensing and pricing is still the same as it was when the
box launched, you're better off with an MX204 :-).

Mark.
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On 9/Jul/20 03:09, Jason Lixfeld wrote:
> I’m not as familiar with the ASR1002-HX, but what I’m pretty sure of is if you’re considering the ASR1002-HX for IGW, you may want to review Juniper’s MX204. It’s probably going to be slightly more expensive than a NCS540, but far less expensive than the ASR1002-HX, but overall it will be a much better bang for your buck as an IGW.

Not forgetting that the NCS540 is a Broadcom chip, while the ASR1000 and
MX204 are in-house silicon.

Mark.
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On 9/Jul/20 03:34, Vikas Sharma wrote:
> Dear Luka,
>
> Thanks for your revert. I have checked all ciscolive presentation before I
> have shooted question to the forum. I understand, LPM and LEM along with
> iTCAM support on C 540 does not exceed 400k but I was not getting details
> on rib/fib on ASR 1002-HX, in case you have found, please share with me.
>
> Also, processing power of ASR vs C 540 is very different, one with quard
> core 1.2 GHz and another with 2.5 GHz, so I was also wondering if BGP
> scanner process will be good with which. If 540 can take care of scanning
> process!!
>
> Also internet does not inform about table-map (atleast, I couldn't find),
> on C 540, many thanks to Jason for details provided.

Also, the ASR1000 is IOS XE, while the NCS540 is IOS XR.

Mark.
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> On Jul 9, 2020, at 10:49 AM, Mark Tinka <mark.tinka@seacom.com> wrote:
>
> Gosh, it's been a while. Didn't realize the name changed. It used to be
> BGP-SD (BGP Selective Download).
>
> I suppose SRD was to make it protocol independent.

I think SRD might be a made-up name, to be honest. My SE referred to it as SRD, so I just started referring to it as that too. But, nowhere in the docs is there actually a reference to that name as a feature, that I can find:

https://www.cisco.com/c/en/us/td/docs/routers/asr9000/software/asr9k-r6-3/routing/configuration/guide/b-routing-cg-asr9000-63x/b-routing-cg-asr9000-63x_chapter_010.html#task_1215567

It still looks to be BGP specific though.

> I've never used SRD on IOS XR, but judging by what I see for the
> NCS5500, it seems to be meant to decide whether routes are downloaded to
> high or low scale line cards. Can anyone clarify?

In the 9K days, they had SVD which did that:

https://www.cisco.com/c/en/us/td/docs/routers/crs/software/crs_r4-3/routing/configuration/guide/b_routing_cg43xcrs/b_routing_cg43xcrs_chapter_010.html#concept_8E1919490E274B9E97F527166CB6EF8A

I don’t know if SVD exists for chassis based NCS5K or if SRD^h^h^htable-policy is the new that, but SVD was per-linecard. Table-policy is a BGP sub configuration, and presumably LC agnostic.

> Classic BGP-SD simply doesn't download those routes to any FIB, regardless.
>
> Mark.
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Vikas,

> On 9 Jul 2020, at 03:34, Vikas Sharma <vikassharmas@gmail.com> wrote:
>
> Dear Luka,
>
> Thanks for your revert. I have checked all ciscolive presentation before I have shooted question to the forum. I understand, LPM and LEM along with iTCAM support on C 540 does not exceed 400k but I was not getting details on rib/fib on ASR 1002-HX, in case you have found, please share with me.

The numbers quoted in the URL are actually FIB size (3.5M for IPv4, 3M for IPv6 or mix of both).

RIB can scale to 11M routes.

--
?ukasz Bromirski
CCIE R&S/SP #15929, CCDE #2012::17, PGP Key ID: 0xFD077F6A

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Jason,

> On 9 Jul 2020, at 03:26, Jason Lixfeld <jason@lixfeld.ca> wrote:
>
>> On Jul 8, 2020, at 9:14 PM, ?ukasz Bromirski <lukasz@bromirski.net <mailto:lukasz@bromirski.net>> wrote:
>>
>> Vikas,
>>
>> First of all, NCS 540 ACC-SYS has 16GB of RAM.
>
> … but only 8GB available to the RP.
>
> RP/0/RP0/CPU0:ncs540-7.lab#show memory summary
> Wed Jul 8 21:19:33.842 EDT

Indeed, that may be the case. Thanks for correcting me. Memory allocated to RP may change in future.

--
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On 9/Jul/20 17:42, Jason Lixfeld wrote:

> I think SRD might be a made-up name, to be honest. My SE referred to it as SRD, so I just started referring to it as that too. But, nowhere in the docs is there actually a reference to that name as a feature, that I can find:
>
> https://www.cisco.com/c/en/us/td/docs/routers/asr9000/software/asr9k-r6-3/routing/configuration/guide/b-routing-cg-asr9000-63x/b-routing-cg-asr9000-63x_chapter_010.html#task_1215567
>
> It still looks to be BGP specific though.

From what I can find, SRD seems to be the new name.

I found some unofficial remnants of BGP-SD:

    https://null.53bits.co.uk/index.php?page=bgp-selective-download

Seems like SRD started to take effect in 2018.


> In the 9K days, they had SVD which did that:
>
> https://www.cisco.com/c/en/us/td/docs/routers/crs/software/crs_r4-3/routing/configuration/guide/b_routing_cg43xcrs/b_routing_cg43xcrs_chapter_010.html#concept_8E1919490E274B9E97F527166CB6EF8A
>
> I don’t know if SVD exists for chassis based NCS5K or if SRD^h^h^htable-policy is the new that, but SVD was per-linecard. Table-policy is a BGP sub configuration, and presumably LC agnostic.

Never heard of SVD, but I found this for the NCS5500:

    https://xrdocs.io/ncs5500/tutorials/mixing-base-and-scale-LC-in-NCS5500/

Mark.
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> On Jul 10, 2020, at 2:56 AM, Mark Tinka <mark.tinka@seacom.com> wrote:
>
>> In the 9K days, they had SVD which did that:
>>
>> https://www.cisco.com/c/en/us/td/docs/routers/crs/software/crs_r4-3/routing/configuration/guide/b_routing_cg43xcrs/b_routing_cg43xcrs_chapter_010.html#concept_8E1919490E274B9E97F527166CB6EF8A
>>
>> I don’t know if SVD exists for chassis based NCS5K or if SRD^h^h^htable-policy is the new that, but SVD was per-linecard. Table-policy is a BGP sub configuration, and presumably LC agnostic.
>
> Never heard of SVD, but I found this for the NCS5500:
>
> https://xrdocs.io/ncs5500/tutorials/mixing-base-and-scale-LC-in-NCS5500/


Nice.

There’s caveat at the bottom of that article that says it’s not supported on J-based FFF pizza boxes. I wonder why? I wonder if that applies to Qumran-AX a’la NCS540 too?

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On Thu, Jul 9, 2020, at 04:36, Vikas Sharma wrote:
> Slight modification, I am looking for fib for ASR 1002-HX

Hi, wasn't ASR1k a "software-based" series, with route lookups NOT done from TCAM, fib limit being the RAM, and forwarding done by homegrown QFP?

I don't really recall things having changed with -HX series.

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On Sat, 11 Jul 2020 at 21:09, Radu-Adrian FEURDEAN
<cisco-nsp@radu-adrian.feurdean.net> wrote:

> Hi, wasn't ASR1k a "software-based" series, with route lookups NOT done from TCAM, fib limit being the RAM, and forwarding done by homegrown QFP?

I would say no, it was not software based, by HW. First gen QSFP or
Popey was 400MHz (1.2GHz if you count multithreading) 40 core, 307M
transistors, 20MB SRAM, 90nm lithography. It was tensilica platform
(like npower) but Cisco IP.
I think 2nd gen upped core count to 64 and frequency to 1.5GHz,
changed to 40nm lithography and transistor count to 1.8B. Unsure what
came after that.

But what is software based and what is hardware based? To me ASR1k is
HW based, it's an NPU box in my mind. Not having TCAM does not
exclude box from being hardware, if not having TCAM means it's not
hardware, then also say Juniper MX, PTX are not hardware, Cisco 8k is
not hardware, Jericho2 isn't hardware, modern stuff tends to run off
of DRAM, not TCAM.

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On Sat, Jul 11, 2020, at 21:34, Saku Ytti wrote:
>
> But what is software based and what is hardware based? To me ASR1k is

Put this way, everything is both software based and hardware based, since there is software running on hardware. Jusy than when using an ASIC, the software part is not doing very much for the packet switching.

> HW based, it's an NPU box in my mind.
> Not having TCAM does not
> exclude box from being hardware, if not having TCAM means it's not
> hardware,

You're right. However, moving away from TCAM usually signals chipsets more complex than ASICs (=more important software component).

> then also say Juniper MX, PTX are not hardware, Cisco 8k is
> not hardware, Jericho2 isn't hardware, modern stuff tends to run off
> of DRAM, not TCAM.

Most of them can definitely do more than dumb packet forwarding, but not so much as to do LNS or CGN in the main NPU (whatever variety the NPU is). A1k OTOH is THE platform to be used if you want to do LNS and CGN with Cisco.

As for TCAM vs *RAM, lack of TCAM signals a FIB scale significantly larger than a full table at the moment the box was designed.

Back to the question, NCS540 is merchant ASIC, while A1K is custom network-oriented processor. I'd expect FIB scale to be a few (~4-5) times higher on A1K than on NCS540.

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On Sun, 12 Jul 2020 at 12:45, Radu-Adrian FEURDEAN
<cisco-nsp@radu-adrian.feurdean.net> wrote:


> > then also say Juniper MX, PTX are not hardware, Cisco 8k is
> > not hardware, Jericho2 isn't hardware, modern stuff tends to run off
> > of DRAM, not TCAM.
>
> Most of them can definitely do more than dumb packet forwarding, but not so much as to do LNS or CGN in the main NPU (whatever variety the NPU is). A1k OTOH is THE platform to be used if you want to do LNS and CGN with Cisco.

I don't know where you base this claim, and I believe it's wrong. I
know Trio could do any of this, I think Cisc8k could, and I'm fairly
certain PTX1k could not. Both Trio and Ciscd8k are run-to-completion,
you run ucode on the NPU and you're only limited by time. Perhaps your
instruction set isn't conducive towards CGN or LNS, meaning you need
too many cycles to do the feature, but certainly it could be done.

> As for TCAM vs *RAM, lack of TCAM signals a FIB scale significantly larger than a full table at the moment the box was designed.

> Back to the question, NCS540 is merchant ASIC, while A1K is custom network-oriented processor. I'd expect FIB scale to be a few (~4-5) times higher on A1K than on NCS540.

J2 is merchant and does DRAM, so that doesn't seem to be a signal either.



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In XR in general we support restricting routes installed in the FIB using table-policy at various locations, but it's done across all NPUs. This specific feature mixing hi/lo FIB line cards adds another knob to tag certain routes as "external" so we can determine which prefixes to install on cards with only external TCAM.

The normal table-policy command is supported on NCS540, some use them as dedicated RRs. There is a 16 (newer N540-ACC-SYS) and 32 GB (24Z8Q2C-SYS) version of the 540.

Thanks,

Phil

?On 7/10/20, 2:10 PM, "cisco-nsp on behalf of Jason Lixfeld" <cisco-nsp-bounces@puck.nether.net on behalf of jason@lixfeld.ca> wrote:



> On Jul 10, 2020, at 2:56 AM, Mark Tinka <mark.tinka@seacom.com> wrote:
>
>> In the 9K days, they had SVD which did that:
>>
>> https://www.cisco.com/c/en/us/td/docs/routers/crs/software/crs_r4-3/routing/configuration/guide/b_routing_cg43xcrs/b_routing_cg43xcrs_chapter_010.html#concept_8E1919490E274B9E97F527166CB6EF8A
>>
>> I don’t know if SVD exists for chassis based NCS5K or if SRD^h^h^htable-policy is the new that, but SVD was per-linecard. Table-policy is a BGP sub configuration, and presumably LC agnostic.
>
> Never heard of SVD, but I found this for the NCS5500:
>
> https://xrdocs.io/ncs5500/tutorials/mixing-base-and-scale-LC-in-NCS5500/


Nice.

There’s caveat at the bottom of that article that says it’s not supported on J-based FFF pizza boxes. I wonder why? I wonder if that applies to Qumran-AX a’la NCS540 too?

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