Clean up two small APIC TDCR issues. First, only save the bits that
can be set, so that a subsequent read can't see MBZ bits as set.
Next, be sure to initialize the timer_divide_count, which is derived
from the TDCR. This avoids a potential divide-by-zero elsewhere in the
code. Technically, the timer_divide_count initialization should be done
from the value of the TDCR, but it's in the init routine and the
registers were all just zeroed by the caller of the init routine.
Signed-off-by: Ben Thomas (ben@virtualiron.com)
--
------------------------------------------------------------------------
Ben Thomas Virtual Iron Software
bthomas@virtualiron.com Tower 1, Floor 2
978-849-1214 900 Chelmsford Street
Lowell, MA 01851
can be set, so that a subsequent read can't see MBZ bits as set.
Next, be sure to initialize the timer_divide_count, which is derived
from the TDCR. This avoids a potential divide-by-zero elsewhere in the
code. Technically, the timer_divide_count initialization should be done
from the value of the TDCR, but it's in the init routine and the
registers were all just zeroed by the caller of the init routine.
Signed-off-by: Ben Thomas (ben@virtualiron.com)
--
------------------------------------------------------------------------
Ben Thomas Virtual Iron Software
bthomas@virtualiron.com Tower 1, Floor 2
978-849-1214 900 Chelmsford Street
Lowell, MA 01851
Attached Files:
-
10048-vlapic_tdcr.patch (1.58 KB)