Xen makes assumptions about the size of integer types on the various
architectures. Document these assumptions.
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
---
Changes in v3:
- add links to System V, AAPCS32 and AAPCS64
---
docs/misra/C-language-toolchain.rst | 69 +++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
index b7c2000992..84b21992bc 100644
--- a/docs/misra/C-language-toolchain.rst
+++ b/docs/misra/C-language-toolchain.rst
@@ -480,4 +480,73 @@ The table columns are as follows:
- See Section "4.13 Preprocessing Directives" of GCC_MANUAL and Section "11.1 Implementation-defined behavior" of CPP_MANUAL.
+Sizes of Integer types
+______________________
+
+Xen expects System V ABI on x86_64:
+ https://gitlab.com/x86-psABIs/x86-64-ABI
+
+Xen expects AAPCS32 on ARMv8-A AArch32:
+ https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
+
+Xen expects AAPCS64 LP64 on ARMv8-A AArch64:
+ https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
+
+A summary table of data types, sizes and alignment is below:
+
+.. list-table::
+ :widths: 10 10 10 45
+ :header-rows: 1
+
+ * - Type
+ - Size
+ - Alignment
+ - Architectures
+
+ * - char
+ - 8 bits
+ - 8 bits
+ - all architectures
+
+ * - short
+ - 16 bits
+ - 16 bits
+ - all architectures
+
+ * - int
+ - 32 bits
+ - 32 bits
+ - all architectures
+
+ * - long
+ - 32 bits
+ - 32 bits
+ - 32-bit architectures (x86_32, ARMv8-A AArch32, ARMv8-R AArch32)
+
+ * - long
+ - 64 bits
+ - 64 bits
+ - 64-bit architectures (x86_64, ARMv8-A AArch64, RV64, PPC64)
+
+ * - long long
+ - 64-bit
+ - 32-bit
+ - x86_32
+
+ * - long long
+ - 64-bit
+ - 64-bit
+ - 64-bit architectures, ARMv8-A AArch32, ARMv8-R AArch32
+
+ * - pointer
+ - 32-bit
+ - 32-bit
+ - 32-bit architectures (x86_32, ARMv8-A AArch32, ARMv8-R AArch32)
+
+ * - pointer
+ - 64-bit
+ - 64-bit
+ - 64-bit architectures (x86_64, ARMv8-A AArch64, RV64, PPC64)
+
+
END OF DOCUMENT.
--
2.25.1
architectures. Document these assumptions.
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
---
Changes in v3:
- add links to System V, AAPCS32 and AAPCS64
---
docs/misra/C-language-toolchain.rst | 69 +++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
index b7c2000992..84b21992bc 100644
--- a/docs/misra/C-language-toolchain.rst
+++ b/docs/misra/C-language-toolchain.rst
@@ -480,4 +480,73 @@ The table columns are as follows:
- See Section "4.13 Preprocessing Directives" of GCC_MANUAL and Section "11.1 Implementation-defined behavior" of CPP_MANUAL.
+Sizes of Integer types
+______________________
+
+Xen expects System V ABI on x86_64:
+ https://gitlab.com/x86-psABIs/x86-64-ABI
+
+Xen expects AAPCS32 on ARMv8-A AArch32:
+ https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
+
+Xen expects AAPCS64 LP64 on ARMv8-A AArch64:
+ https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
+
+A summary table of data types, sizes and alignment is below:
+
+.. list-table::
+ :widths: 10 10 10 45
+ :header-rows: 1
+
+ * - Type
+ - Size
+ - Alignment
+ - Architectures
+
+ * - char
+ - 8 bits
+ - 8 bits
+ - all architectures
+
+ * - short
+ - 16 bits
+ - 16 bits
+ - all architectures
+
+ * - int
+ - 32 bits
+ - 32 bits
+ - all architectures
+
+ * - long
+ - 32 bits
+ - 32 bits
+ - 32-bit architectures (x86_32, ARMv8-A AArch32, ARMv8-R AArch32)
+
+ * - long
+ - 64 bits
+ - 64 bits
+ - 64-bit architectures (x86_64, ARMv8-A AArch64, RV64, PPC64)
+
+ * - long long
+ - 64-bit
+ - 32-bit
+ - x86_32
+
+ * - long long
+ - 64-bit
+ - 64-bit
+ - 64-bit architectures, ARMv8-A AArch32, ARMv8-R AArch32
+
+ * - pointer
+ - 32-bit
+ - 32-bit
+ - 32-bit architectures (x86_32, ARMv8-A AArch32, ARMv8-R AArch32)
+
+ * - pointer
+ - 64-bit
+ - 64-bit
+ - 64-bit architectures (x86_64, ARMv8-A AArch64, RV64, PPC64)
+
+
END OF DOCUMENT.
--
2.25.1