Hi Stefano / Anthony,
With the debug output turned on i see some difference between qemu-traditional and qemu-upstream:
With the pci passthroughed device that fails with msi-x, in qemu-xen it seems to get the same pirq back for every entry
in qemu-traditional:
pt_msix_update_one: pt_msix_update_one requested pirq = 87
pt_msix_update_one: Update msix entry 0 with pirq 57 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 86
pt_msix_update_one: Update msix entry 1 with pirq 56 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 85
pt_msix_update_one: Update msix entry 2 with pirq 55 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 84
pt_msix_update_one: Update msix entry 3 with pirq 54 gvec 0
in qemu-xen (upstream):
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3057 (entry: 0)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x1)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3056 (entry: 0x1)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x2)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3055 (entry: 0x2)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x3)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3054 (entry: 0x3)
--
Sander
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Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
With the debug output turned on i see some difference between qemu-traditional and qemu-upstream:
With the pci passthroughed device that fails with msi-x, in qemu-xen it seems to get the same pirq back for every entry
in qemu-traditional:
pt_msix_update_one: pt_msix_update_one requested pirq = 87
pt_msix_update_one: Update msix entry 0 with pirq 57 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 86
pt_msix_update_one: Update msix entry 1 with pirq 56 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 85
pt_msix_update_one: Update msix entry 2 with pirq 55 gvec 0
pt_msix_update_one: pt_msix_update_one requested pirq = 84
pt_msix_update_one: Update msix entry 3 with pirq 54 gvec 0
in qemu-xen (upstream):
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3057 (entry: 0)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x1)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3056 (entry: 0x1)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x2)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3055 (entry: 0x2)
[00:05.0] msi_msix_setup: requested pirq 4 for MSI-X (vec: 0, entry: 0x3)
[00:05.0] msi_msix_update: Updating MSI-X with pirq 4 gvec 0 gflags 0x3054 (entry: 0x3)
--
Sander
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel