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# HG changeset patch
# User Wei Wang <wei.wang2@amd.com>
# Date 1326213611 -3600
# Node ID f1bf84f5fbb94f8702c8e96462e715ad5066dca2
# Parent 2f9c68c3b521efccebebffe76d17ace7dbae5e25
amd iommu: Enable FC bit in iommu host level PTE

Signed-off-by: Wei Wang <wei.wang2@amd.com>

diff -r 2f9c68c3b521 -r f1bf84f5fbb9 xen/drivers/passthrough/amd/iommu_map.c
--- a/xen/drivers/passthrough/amd/iommu_map.c Tue Jan 10 17:40:08 2012 +0100
+++ b/xen/drivers/passthrough/amd/iommu_map.c Tue Jan 10 17:40:11 2012 +0100
@@ -83,6 +83,13 @@ static bool_t set_iommu_pde_present(u32
set_field_in_reg_u32(ir, entry,
IOMMU_PDE_IO_READ_PERMISSION_MASK,
IOMMU_PDE_IO_READ_PERMISSION_SHIFT, &entry);
+
+ /* FC bit should be enabled in PTE, this helps to solve potential
+ * issues with ATS devices
+ */
+ if ( next_level == IOMMU_PAGING_MODE_LEVEL_0 )
+ set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry,
+ IOMMU_PTE_FC_MASK, IOMMU_PTE_FC_SHIFT, &entry);
pde[1] = entry;

/* mark next level as 'present' */


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