Mailing List Archive

# HG changeset patch
# User Stefano Stabellini <stefano.stabellini@eu.citrix.com>
# Date 1298633385 0
# Node ID 54fe1011f86be2ffeaba3b6e883392ea56bbb750
# Parent 2d35823a86e7fbab004125591e56cd14aeaffcb3
x86 NMI: continue in case of PCI SERR erros

Memory parity error is only valid for IBM PC-AT, newer machines use
bit 7 (0x80) of 0x61 port for PCI SERR. While memory errors are
usually reported via MCE.

Rename the memory parity error handler to pci serr handler and
print a warning and continue instead of crashing.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
---


diff -r 2d35823a86e7 -r 54fe1011f86b xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Fri Feb 25 11:28:15 2011 +0000
+++ b/xen/arch/x86/traps.c Fri Feb 25 11:29:45 2011 +0000
@@ -3075,23 +3075,12 @@
send_guest_trap(d, 0, TRAP_nmi);
}

-static void mem_parity_error(struct cpu_user_regs *regs)
+static void pci_serr_error(struct cpu_user_regs *regs)
{
- switch ( opt_nmi[0] )
- {
- case 'd': /* 'dom0' */
- nmi_dom0_report(_XEN_NMIREASON_parity_error);
- case 'i': /* 'ignore' */
- break;
- default: /* 'fatal' */
- console_force_unlock();
- printk("\n\nNMI - MEMORY ERROR\n");
- fatal_trap(TRAP_nmi, regs);
- }
-
- outb((inb(0x61) & 0x0f) | 0x04, 0x61); /* clear-and-disable parity check */
- mdelay(1);
- outb((inb(0x61) & 0x0b) | 0x00, 0x61); /* enable parity check */
+ console_force_unlock();
+ printk("\n\nNMI - PCI system error (SERR)\n");
+
+ outb((inb(0x61) & 0x0f) | 0x04, 0x61); /* clear-and-disable the PCI SERR error line. */
}

static void io_check_error(struct cpu_user_regs *regs)
@@ -3154,7 +3143,7 @@
{
reason = inb(0x61);
if ( reason & 0x80 )
- mem_parity_error(regs);
+ pci_serr_error(regs);
else if ( reason & 0x40 )
io_check_error(regs);
else if ( !nmi_watchdog )

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