Mailing List Archive

# HG changeset patch
# User Wei Gang <gang.wei@intel.com>
# Date 1298279517 0
# Node ID 13a7d1f7f62cfcdfd256bcd9c4f17876c19c827f
# Parent dac86c85222e6a6b067bf7208a57d96fb3e6f57a
x86: add strictly sanity check for XSAVE/XRSTOR

Replace most checks on cpu_has_xsave with checks on new fn
xsave_enabled(), do additional sanity checks in the new fn.

Signed-off-by: Wei Gang <gang.wei@intel.com>
Signed-off-by: Keir Fraser <keir.xen@gmail.com>
---


diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/domain.c
--- a/xen/arch/x86/domain.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/domain.c Mon Feb 21 09:11:57 2011 +0000
@@ -628,7 +628,7 @@
hv_cr4_mask &= ~X86_CR4_DE;
if ( cpu_has_fsgsbase && !is_pv_32bit_domain(v->domain) )
hv_cr4_mask &= ~X86_CR4_FSGSBASE;
- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
hv_cr4_mask &= ~X86_CR4_OSXSAVE;

if ( (guest_cr4 & hv_cr4_mask) != (hv_cr4 & hv_cr4_mask) )
@@ -1402,7 +1402,7 @@
memcpy(stack_regs,
&n->arch.guest_context.user_regs,
CTXT_SWITCH_STACK_BYTES);
- if ( cpu_has_xsave && n->arch.xcr0 != get_xcr0() )
+ if ( xsave_enabled(n) && n->arch.xcr0 != get_xcr0() )
set_xcr0(n->arch.xcr0);
n->arch.ctxt_switch_to(n);
}
diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/domctl.c
--- a/xen/arch/x86/domctl.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/domctl.c Mon Feb 21 09:11:57 2011 +0000
@@ -1603,7 +1603,7 @@
#endif

/* Fill legacy context from xsave area first */
- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
memcpy(v->arch.xsave_area, &v->arch.guest_context.fpu_ctxt,
sizeof(v->arch.guest_context.fpu_ctxt));

diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/hvm/hvm.c
--- a/xen/arch/x86/hvm/hvm.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/hvm/hvm.c Mon Feb 21 09:11:57 2011 +0000
@@ -676,7 +676,7 @@
return -EINVAL;
}

- if ( ctxt.cr4 & HVM_CR4_GUEST_RESERVED_BITS )
+ if ( ctxt.cr4 & HVM_CR4_GUEST_RESERVED_BITS(v) )
{
gdprintk(XENLOG_ERR, "HVM restore: bad CR4 0x%"PRIx64"\n",
ctxt.cr4);
@@ -773,7 +773,7 @@
memcpy(&vc->fpu_ctxt, ctxt.fpu_regs, sizeof(ctxt.fpu_regs));

/* In case xsave-absent save file is restored on a xsave-capable host */
- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
{
struct xsave_struct *xsave_area = v->arch.xsave_area;

@@ -836,6 +836,8 @@

for_each_vcpu ( d, v )
{
+ if ( !xsave_enabled(v) )
+ continue;
if ( _hvm_init_entry(h, CPU_XSAVE_CODE, v->vcpu_id, HVM_CPU_XSAVE_SIZE) )
return 1;
ctxt = (struct hvm_hw_cpu_xsave *)&h->data[h->cur];
@@ -861,11 +863,6 @@
struct hvm_save_descriptor *desc;
uint64_t _xfeature_mask;

- /* fails since we can't restore an img saved on xsave-capable host */
-//XXX:
- if ( !cpu_has_xsave )
- return -EINVAL;
-
/* Which vcpu is this? */
vcpuid = hvm_load_instance(h);
if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL )
@@ -874,6 +871,10 @@
return -EINVAL;
}

+ /* Fails since we can't restore an img saved on xsave-capable host. */
+ if ( !xsave_enabled(v) )
+ return -EINVAL;
+
/* Customized checking for entry since our entry is of variable length */
desc = (struct hvm_save_descriptor *)&h->data[h->cur];
if ( sizeof (*desc) > h->size - h->cur)
@@ -1453,7 +1454,7 @@
struct vcpu *v = current;
unsigned long old_cr;

- if ( value & HVM_CR4_GUEST_RESERVED_BITS )
+ if ( value & HVM_CR4_GUEST_RESERVED_BITS(v) )
{
HVM_DBG_LOG(DBG_LEVEL_1,
"Guest attempts to set reserved bit in CR4: %lx",
@@ -2208,7 +2209,7 @@
__clear_bit(X86_FEATURE_APIC & 31, edx);

/* Fix up OSXSAVE. */
- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
*ecx |= (v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_OSXSAVE) ?
bitmaskof(X86_FEATURE_OSXSAVE) : 0;
break;
diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/hvm/vmx/vmcs.c
--- a/xen/arch/x86/hvm/vmx/vmcs.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/hvm/vmx/vmcs.c Mon Feb 21 09:11:57 2011 +0000
@@ -760,7 +760,8 @@
/* Host control registers. */
v->arch.hvm_vmx.host_cr0 = read_cr0() | X86_CR0_TS;
__vmwrite(HOST_CR0, v->arch.hvm_vmx.host_cr0);
- __vmwrite(HOST_CR4, mmu_cr4_features | (cpu_has_xsave ? X86_CR4_OSXSAVE : 0));
+ __vmwrite(HOST_CR4,
+ mmu_cr4_features | (xsave_enabled(v) ? X86_CR4_OSXSAVE : 0));

/* Host CS:RIP. */
__vmwrite(HOST_CS_SELECTOR, __HYPERVISOR_CS);
diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/i387.c
--- a/xen/arch/x86/i387.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/i387.c Mon Feb 21 09:11:57 2011 +0000
@@ -69,7 +69,7 @@
if ( v->fpu_dirtied )
return;

- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
{
/*
* XCR0 normally represents what guest OS set. In case of Xen itself,
@@ -116,7 +116,7 @@
if ( cr0 & X86_CR0_TS )
clts();

- if ( cpu_has_xsave )
+ if ( xsave_enabled(v) )
{
/* XCR0 normally represents what guest OS set. In case of Xen itself,
* we set all accumulated feature mask before doing save/restore.
@@ -316,6 +316,17 @@
v->arch.xsave_area = NULL;
}

+bool_t xsave_enabled(const struct vcpu *v)
+{
+ if ( cpu_has_xsave )
+ {
+ ASSERT(xsave_cntxt_size >= XSAVE_AREA_MIN_SIZE);
+ ASSERT(v->arch.xsave_area);
+ }
+
+ return cpu_has_xsave;
+}
+
/*
* Local variables:
* mode: C
diff -r dac86c85222e -r 13a7d1f7f62c xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/arch/x86/traps.c Mon Feb 21 09:11:57 2011 +0000
@@ -771,7 +771,7 @@
__clear_bit(X86_FEATURE_XTPR % 32, &c);
__clear_bit(X86_FEATURE_PDCM % 32, &c);
__clear_bit(X86_FEATURE_DCA % 32, &c);
- if ( !cpu_has_xsave )
+ if ( !xsave_enabled(current) )
{
__clear_bit(X86_FEATURE_XSAVE % 32, &c);
__clear_bit(X86_FEATURE_AVX % 32, &c);
diff -r dac86c85222e -r 13a7d1f7f62c xen/include/asm-x86/domain.h
--- a/xen/include/asm-x86/domain.h Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/include/asm-x86/domain.h Mon Feb 21 09:11:57 2011 +0000
@@ -464,7 +464,7 @@
(((v)->arch.guest_context.ctrlreg[4] \
| (mmu_cr4_features & (X86_CR4_PGE | X86_CR4_PSE)) \
| ((v)->domain->arch.vtsc ? X86_CR4_TSD : 0) \
- | ((cpu_has_xsave)? X86_CR4_OSXSAVE : 0)) \
+ | ((xsave_enabled(v))? X86_CR4_OSXSAVE : 0)) \
& ~X86_CR4_DE)
#define real_cr4_to_pv_guest_cr4(c) \
((c) & ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_TSD | X86_CR4_OSXSAVE))
diff -r dac86c85222e -r 13a7d1f7f62c xen/include/asm-x86/hvm/hvm.h
--- a/xen/include/asm-x86/hvm/hvm.h Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/include/asm-x86/hvm/hvm.h Mon Feb 21 09:11:57 2011 +0000
@@ -285,13 +285,13 @@
(X86_CR4_VMXE | X86_CR4_PAE | X86_CR4_MCE))

/* These bits in CR4 cannot be set by the guest. */
-#define HVM_CR4_GUEST_RESERVED_BITS \
+#define HVM_CR4_GUEST_RESERVED_BITS(_v) \
(~((unsigned long) \
(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | \
X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \
X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT | \
- (cpu_has_xsave ? X86_CR4_OSXSAVE : 0))))
+ (xsave_enabled(_v) ? X86_CR4_OSXSAVE : 0))))

/* These exceptions must always be intercepted. */
#define HVM_TRAP_MASK ((1U << TRAP_machine_check) | (1U << TRAP_invalid_op))
diff -r dac86c85222e -r 13a7d1f7f62c xen/include/asm-x86/i387.h
--- a/xen/include/asm-x86/i387.h Fri Feb 18 19:07:11 2011 +0000
+++ b/xen/include/asm-x86/i387.h Mon Feb 21 09:11:57 2011 +0000
@@ -11,8 +11,10 @@
#ifndef __ASM_I386_I387_H
#define __ASM_I386_I387_H

-#include <xen/sched.h>
-#include <asm/processor.h>
+#include <xen/types.h>
+#include <xen/percpu.h>
+
+struct vcpu;

extern unsigned int xsave_cntxt_size;
extern u64 xfeature_mask;
@@ -20,6 +22,7 @@
void xsave_init(void);
int xsave_alloc_save_area(struct vcpu *v);
void xsave_free_save_area(struct vcpu *v);
+bool_t xsave_enabled(const struct vcpu *v);

#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
#define XSTATE_FP (1ULL << 0)

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