Mailing List Archive: Patch for K6 sep flag

Patch for K6 sep flag

bgerst at quark

Jan 1, 1999, 6:34 PM

Post #1 of 13 (1014 views)

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This patch fixes /proc/cpuinfo for the K6 model 6. On this version of
the K6, bit 10 of the extended flags register denotes the SYSCALL/SYSRET
capability. On later models, bit 11 (the same as the PPro/PII) is used.
--
Brian Gerst
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--- arch/i386/kernel/setup.c.bak Fri Jan 1 19:25:41 1999
+++ arch/i386/kernel/setup.c Fri Jan 1 19:30:00 1999
@@ -689,6 +689,8 @@
} else if (c->x86_vendor == X86_VENDOR_AMD) {
x86_cap_flags[16] = "fcmov";
x86_cap_flags[31] = "3dnow";
+ if (c->x86 == 5 && c->x86_model == 6)
+ x86_cap_flags[10] = "sep";
} else if (c->x86_vendor == X86_VENDOR_INTEL) {
x86_cap_flags[6] = "pae";
x86_cap_flags[9] = "apic";
--------------BC83B5A56ABC1093034BABE2--
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Re: Patch for K6 sep flag [ In reply to ]

Jan 2, 1999, 12:31 AM

Post #2 of 13 (1009 views)

> This patch fixes /proc/cpuinfo for the K6 model 6. On this version of
> the K6, bit 10 of the extended flags register denotes the SYSCALL/SYSRET
> capability. On later models, bit 11 (the same as the PPro/PII) is used.
>
My K6 is identified by the kernel as model 7, yet it shows bit 10
in the flags. I wonder exactly when (mid-model 6, mid-model 7?) AMD
corrected that.
--
Steve Kump <skump@inch.com>
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Re: Patch for K6 sep flag [ In reply to ]

Jan 2, 1999, 11:40 AM

Post #3 of 13 (1012 views)

BG> This patch fixes /proc/cpuinfo for the K6 model 6. On this version of
BG> the K6, bit 10 of the extended flags register denotes the SYSCALL/SYSRET
BG> capability. On later models, bit 11 (the same as the PPro/PII) is used.
Yep, it works.
processor : 0
vendor_id : AuthenticAMD
cpu family : 5
model : 6
model name : AMD-K6tm w/ multimedia extensions
stepping : 2
cpu MHz : 200.457171
fdiv_bug : no
hlt_bug : no
sep_bug : no
f00f_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr mce cx8 sep mmx
bogomips : 399.77
--
Meelis Roos (mroos@tartu.cyber.ee)
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Re: Patch for K6 sep flag [ In reply to ]

bgerst at quark

Jan 2, 1999, 5:48 PM

Post #4 of 13 (1019 views)

Brian Gerst wrote:
>
> This patch fixes /proc/cpuinfo for the K6 model 6. On this version of
> the K6, bit 10 of the extended flags register denotes the SYSCALL/SYSRET
> capability. On later models, bit 11 (the same as the PPro/PII) is used.
Digging a bit deeper into AMD's documentation, I found that this is only
true for the stepping A of the model 6. Beginning with the B step model
6, bit 11 is used for SYSCALL/SYSRET. Bit 10 is now marked as
"reserved", and probably should be ignored. I've been experimenting
with implementing a SYSCALL handler, but the MSR that controls it seems
to be unimplemented on my chip (K6-233, model 6, C step). I've wanted
to upgrade anyways, so this is more incentive...
In short, my previous patch doesn't really work as advertised. Bit 10
now is either advertising a feature AMD isn't telling anybody about, or
it is erroneous.
PS. A while back (a year ago?) somebody had posted a patch that started
to implement SYSCALL. Does anybody remember who posted it or where I
can find it?
--
Brian Gerst
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Re: Patch for K6 sep flag [ In reply to ]

Frank.Heldt at t-online

Jan 3, 1999, 2:33 PM

Post #5 of 13 (1011 views)

Brian Gerst wrote:
> PS. A while back (a year ago?) somebody had posted a patch that started
> to implement SYSCALL. Does anybody remember who posted it or where I
> can find it?
AFAIK, mingo has an experimental implementation of SYSENTER/SYSEXIT for
the
PPro/PII, which will (hopefully) make it's way into 2.3 someday. On the
K6
it is called SYSCALL/SYSRET and Jean Wolter <jw5@os.inf.tu-dresden.de>
has
done some work in this area. The bad thing is that it doesn't work on
the
older K6 revisions (as mine) :-(
Frank
PS: mingo, if you read this, what's the current status of
SYSENTER/SYSEXIT ?
--
Frank Heldt
mailto:Frank.Heldt@t-online.de
mailto:Frank.Heldt@mahr.de
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Re: Patch for K6 sep flag [ In reply to ]

tmolina at probe

Jan 4, 1999, 6:23 AM

Post #6 of 13 (1012 views)

On Sat, 2 Jan 1999, Meelis Roos wrote:
> BG> This patch fixes /proc/cpuinfo for the K6 model 6. On this version of
> BG> the K6, bit 10 of the extended flags register denotes the SYSCALL/SYSRET
> BG> capability. On later models, bit 11 (the same as the PPro/PII) is used.
>
> Yep, it works.
I wanted to take this opportunity to say the code in 2.2.0pre3 seems to
correctly identify the features in a later K6 (model 8). I now get
3dnow detected as it should. Thanks.
processor : 0
vendor_id : AuthenticAMD
cpu family : 5
model : 8
model name : AMD-K6(tm) 3D processor
stepping : unknown
cpu MHz : 350.802788
fdiv_bug : no
hlt_bug : no
sep_bug : no
f00f_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr mce cx8 sep mmx 3dnow
bogomips : 699.60
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Re: Patch for K6 sep flag [ In reply to ]

Jan 5, 1999, 3:15 AM

Post #7 of 13 (1010 views)

TM> I wanted to take this opportunity to say the code in 2.2.0pre3 seems to
TM> correctly identify the features in a later K6 (model 8). I now get
TM> 3dnow detected as it should. Thanks.
TM> processor : 0
TM> vendor_id : AuthenticAMD
TM> cpu family : 5
TM> model : 8
TM> model name : AMD-K6(tm) 3D processor
TM> stepping : unknown
Are you sure that the 'unknown' stepping is the best we can get? Do the
newer AMD cpus have a concept of stepping or do they have just the
model?
--
Meelis Roos (mroos@tartu.cyber.ee)
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Re: Patch for K6 sep flag [ In reply to ]

jnieho38 at calvin

Jan 6, 1999, 12:14 AM

Post #8 of 13 (1008 views)

> Are you sure that the 'unknown' stepping is the best we
> can get? Do the newer AMD cpus have a concept of
> stepping or do they have just the model?
AMD Processor Recognition Application note states:
CPUID function 8000_0001h--AMD Processor Signature and
Extended Feature Flags:
EAX[3-0] Stepping ID
EAX[7-4] Model
EAX[11-8] Generation/Family
EAX[31-12] Reserved
--Jon
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Re: Patch for K6 sep flag [ In reply to ]

Jan 6, 1999, 9:03 AM

Post #9 of 13 (1014 views)

> > TM> processor : 0
> > TM> vendor_id : AuthenticAMD
> > TM> cpu family : 5
> > TM> model : 8
> > TM> model name : AMD-K6(tm) 3D processor
> > TM> stepping : unknown
> >
> > Are you sure that the 'unknown' stepping is the best we can get? Do the
> > newer AMD cpus have a concept of stepping or do they have just the
> > model?
>
> You probably have an A step cpu which reports a mask version of 0. The
> kernel assumes that if the mask is 0, then it is unknown. This may be
> true for Intel chips, but not AMD.
It's not me, I have
vendor_id : AuthenticAMD
cpu family : 5
model : 6
model name : AMD-K6tm w/ multimedia extensions
stepping : 2
I was just saying that the very above is not perfect due to the 'unknown'
line.
BTW, why do we have AMD-K6(tm) 3D processor but AMD-K6tm w/ multimedia
extensions? - notice the brackets.
---
Meelis Roos (mroos@tartu.cyber.ee)
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Re: Patch for K6 sep flag [ In reply to ]

bgerst at quark

Jan 6, 1999, 9:05 AM

Post #10 of 13 (1010 views)

Meelis Roos wrote:
>
> TM> I wanted to take this opportunity to say the code in 2.2.0pre3 seems to
> TM> correctly identify the features in a later K6 (model 8). I now get
> TM> 3dnow detected as it should. Thanks.
>
> TM> processor : 0
> TM> vendor_id : AuthenticAMD
> TM> cpu family : 5
> TM> model : 8
> TM> model name : AMD-K6(tm) 3D processor
> TM> stepping : unknown
>
> Are you sure that the 'unknown' stepping is the best we can get? Do the
> newer AMD cpus have a concept of stepping or do they have just the
> model?
You probably have an A step cpu which reports a mask version of 0. The
kernel assumes that if the mask is 0, then it is unknown. This may be
true for Intel chips, but not AMD.
--
Brian Gerst
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Re: Patch for K6 sep flag [ In reply to ]

alan at lxorguk

Jan 7, 1999, 4:31 PM

Post #11 of 13 (1010 views)

> You probably have an A step cpu which reports a mask version of 0. The
> kernel assumes that if the mask is 0, then it is unknown. This may be
> true for Intel chips, but not AMD.
Fix sent to Linus
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Re: Patch for K6 sep flag [ In reply to ]

Jan 7, 1999, 6:49 PM

Post #12 of 13 (1011 views)

Hi Meelis.
> BTW, why do we have AMD-K6(tm) 3D processor but AMD-K6tm w/
> multimedia extensions? - notice the brackets.
Perhaps there's a limit to the length of that field, and the brackets
wouldnae fit in with the rest of the text...
Best wishes from Riley.
---
* ftp://ps.cus.umist.ac.uk/pub/rhw/Linux
* http://ps.cus.umist.ac.uk/~rhw/kernel.versions.html
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Re: Patch for K6 sep flag [ In reply to ]

bgerst at quark

Jan 7, 1999, 9:53 PM

Post #13 of 13 (1013 views)

Meelis Roos wrote:
>
> > > TM> processor : 0
> > > TM> vendor_id : AuthenticAMD
> > > TM> cpu family : 5
> > > TM> model : 8
> > > TM> model name : AMD-K6(tm) 3D processor
> > > TM> stepping : unknown
> > >
> > > Are you sure that the 'unknown' stepping is the best we can get? Do the
> > > newer AMD cpus have a concept of stepping or do they have just the
> > > model?
> >
> > You probably have an A step cpu which reports a mask version of 0. The
> > kernel assumes that if the mask is 0, then it is unknown. This may be
> > true for Intel chips, but not AMD.
>
> It's not me, I have
> vendor_id : AuthenticAMD
> cpu family : 5
> model : 6
> model name : AMD-K6tm w/ multimedia extensions
> stepping : 2
>
> I was just saying that the very above is not perfect due to the 'unknown'
> line.
>
> BTW, why do we have AMD-K6(tm) 3D processor but AMD-K6tm w/ multimedia
> extensions? - notice the brackets.
That's just the string the chip reports to us. There is a limit of 40
characters.
--
Brian Gerst
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