Hello gang,
Matt Sealey posted some interesting links in his blog
(http://likerabbits.blogspot.com/2005/06/apples-and-oranges.html) that I
thought I'd share with you. First there are some articles posted by Apple on
differences between AltiVec on the PowerPC and SSE on x86. I think it's
interesting that they post these articles because all they do is show how bad
SSE really is compared to AltiVec.
Finally there is a link to the MacSTL developer's site where he shows some
benchmarks on performance between AltiVec on a G5 vs SSE on a P4. He draws
some pretty interesting conclusions.
For those of you who doesn't want to visit Matt's blog I have put the actual
links here. If you decide to spread the word give credit to Matt and not me.
Differences in Instruction Architectures:
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_vector/chapter_6_section_3.html#//apple_ref/doc/uid/TP40002217-//apple_ref/doc/uid/TP40002217-CH208-253725-TPXREF159
Aligning data:
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_vector/chapter_6_section_3.html#//apple_ref/doc/uid/TP40002217-//apple_ref/doc/uid/TP40002217-CH208-258042-CJBBAJBD
Intrinsics equivalents (note how most AltiVec instructions translate into two
or more SSE instructions, or in the worst case do not have an equivalent at
all):
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_equiv_a/chapter_8_section_2.html#//apple_ref/doc/uid/TP40002217-CH212-263166
MacSTL benchmarks:
http://www.pixelglow.com/stories/macintel-faster-than-altivec/
//David Holm
P.S. Don't forget to click "Yes" at the bottom of the article(s) and let Apple
know what you think ;) D.S.
Matt Sealey posted some interesting links in his blog
(http://likerabbits.blogspot.com/2005/06/apples-and-oranges.html) that I
thought I'd share with you. First there are some articles posted by Apple on
differences between AltiVec on the PowerPC and SSE on x86. I think it's
interesting that they post these articles because all they do is show how bad
SSE really is compared to AltiVec.
Finally there is a link to the MacSTL developer's site where he shows some
benchmarks on performance between AltiVec on a G5 vs SSE on a P4. He draws
some pretty interesting conclusions.
For those of you who doesn't want to visit Matt's blog I have put the actual
links here. If you decide to spread the word give credit to Matt and not me.
Differences in Instruction Architectures:
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_vector/chapter_6_section_3.html#//apple_ref/doc/uid/TP40002217-//apple_ref/doc/uid/TP40002217-CH208-253725-TPXREF159
Aligning data:
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_vector/chapter_6_section_3.html#//apple_ref/doc/uid/TP40002217-//apple_ref/doc/uid/TP40002217-CH208-258042-CJBBAJBD
Intrinsics equivalents (note how most AltiVec instructions translate into two
or more SSE instructions, or in the worst case do not have an equivalent at
all):
http://developer.apple.com/documentation/MacOSX/Conceptual/universal_binary/universal_binary_equiv_a/chapter_8_section_2.html#//apple_ref/doc/uid/TP40002217-CH212-263166
MacSTL benchmarks:
http://www.pixelglow.com/stories/macintel-faster-than-altivec/
//David Holm
P.S. Don't forget to click "Yes" at the bottom of the article(s) and let Apple
know what you think ;) D.S.