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[xen master] ns16550: add more device IDs for Intel LPSS UART
commit 1f0b1f5cce9d5ff0ac1df8145847763b4bf8ef97
Author: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Wed May 18 11:19:25 2022 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Wed May 18 11:19:25 2022 +0200

ns16550: add more device IDs for Intel LPSS UART

This is purely based on the spec:
- Intel 500 Series PCH: 635218-006
- Intel 600 Series PCH: 691222-001, 648364-003

This is tested only on TGL-LP added initially, but according to the
spec, they should behave the same.

Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/drivers/char/ns16550.c | 80 +++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index fb75cee4a1..c133f1f466 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1077,12 +1077,90 @@ static const struct ns16550_config __initconst uart_config[] =
.dev_id = 0x0358,
.param = param_exar_xr17v358
},
- /* Intel Corp. TGL-LP LPSS PCI */
+ /* Intel Corp. TGL-LP LPSS PCI UART #0 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0xa0a8,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. TGL-LP LPSS PCI UART #1 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0xa0a9,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. TGL-LP LPSS PCI UART #2 */
{
.vendor_id = PCI_VENDOR_ID_INTEL,
.dev_id = 0xa0c7,
.param = param_intel_lpss
},
+ /* Intel Corp. TGL-H LPSS PCI UART #0 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x43a8,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. TGL-H LPSS PCI UART #1 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x43a9,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. TGL-H LPSS PCI UART #2 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x43a7,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-P LPSS PCI UART #0 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x51a8,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-P LPSS PCI UART #1 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x51a9,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-P LPSS PCI UART #2 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x51c7,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-P LPSS PCI UART #3 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x51da,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-S LPSS PCI UART #0 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x7aa8,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-S LPSS PCI UART #1 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x7aa9,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-S LPSS PCI UART #2 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x7afe,
+ .param = param_intel_lpss
+ },
+ /* Intel Corp. ADL-S LPSS PCI UART #3 */
+ {
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .dev_id = 0x7adc,
+ .param = param_intel_lpss
+ },
};

static int __init
--
generated by git-patchbot for /home/xen/git/xen.git#master