Mailing List Archive

# HG changeset patch
# User awilliam@xenbuild.aw
# Node ID 29d31af10e57c275e112236cd7d9a12440e4856a
# Parent 83c0449db67ac3c9b5e04c91ed042a0629ff48d8
[IA64] Add ptc.l emulation

This patch adds support for ptc.l emulation for xenlinux.
In 2.6.16 kernel it flush_tlb_range will call global_tlb_purge
directly, so ptc.l shouldn't be used when CONFIG_SMP enable.
But in order to enhance performance (maybe), 2.6.17 kernel in
smp environment will do mm check first. If mm is current->active_mm
and the mm (corresponding process) just runs on the local processor,
kernel only needs to do ptc.l at local processor instead of global purge.
So ptc.l emulation is necessary for 2.6.17 kernel.

Signed-off-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
---
xen/arch/ia64/xen/privop.c | 8 ++++----
xen/arch/ia64/xen/vcpu.c | 17 +++++++++++------
xen/include/asm-ia64/vcpu.h | 2 +-
3 files changed, 16 insertions(+), 11 deletions(-)

diff -r 83c0449db67a -r 29d31af10e57 xen/arch/ia64/xen/privop.c
--- a/xen/arch/ia64/xen/privop.c Tue May 23 17:05:27 2006 -0600
+++ b/xen/arch/ia64/xen/privop.c Wed May 24 08:48:21 2006 -0600
@@ -129,10 +129,10 @@ IA64FAULT priv_ptc_l(VCPU *vcpu, INST64
IA64FAULT priv_ptc_l(VCPU *vcpu, INST64 inst)
{
UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
- UINT64 addr_range;
-
- addr_range = 1 << ((vcpu_get_gr(vcpu,inst.M45.r2) & 0xfc) >> 2);
- return vcpu_ptc_l(vcpu,vadr,addr_range);
+ UINT64 log_range;
+
+ log_range = ((vcpu_get_gr(vcpu,inst.M45.r2) & 0xfc) >> 2);
+ return vcpu_ptc_l(vcpu,vadr,log_range);
}

IA64FAULT priv_ptc_e(VCPU *vcpu, INST64 inst)
diff -r 83c0449db67a -r 29d31af10e57 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Tue May 23 17:05:27 2006 -0600
+++ b/xen/arch/ia64/xen/vcpu.c Wed May 24 08:48:21 2006 -0600
@@ -1848,12 +1848,17 @@ IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64
return IA64_NO_FAULT;
}

-IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range)
-{
- printk("vcpu_ptc_l: called, not implemented yet\n");
- return IA64_ILLOP_FAULT;
-}
-
+IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 log_range)
+{
+ /* Purge TC */
+ vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
+ vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
+
+ /*Purge all tlb and vhpt*/
+ vcpu_flush_tlb_vhpt_range (vadr, log_range);
+
+ return IA64_NO_FAULT;
+}
// At privlvl=0, fc performs no access rights or protection key checks, while
// at privlvl!=0, fc performs access rights checks as if it were a 1-byte
// read but no protection key check. Thus in order to avoid an unexpected
diff -r 83c0449db67a -r 29d31af10e57 xen/include/asm-ia64/vcpu.h
--- a/xen/include/asm-ia64/vcpu.h Tue May 23 17:05:27 2006 -0600
+++ b/xen/include/asm-ia64/vcpu.h Wed May 24 08:48:21 2006 -0600
@@ -145,7 +145,7 @@ extern IA64FAULT vcpu_itr_i(VCPU *vcpu,
UINT64 itir, UINT64 ifa);
extern IA64FAULT vcpu_itc_d(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
extern IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
-extern IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
+extern IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 log_range);
extern IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 vadr);
extern IA64FAULT vcpu_ptc_g(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
extern IA64FAULT vcpu_ptc_ga(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);

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