Mailing List Archive

[PATCH v2 1/3] Add detection for HW feature "ARMv8 SVE"
* configure.ac (svesupport, gcry_cv_gcc_inline_asm_aarch64_sve)
(ENABLE_SVE_SUPPORT): New.
* doc/gcrypt.texi: Add "arm-sve" to HW features list.
* src/g10lib.h (HWF_ARM_SVE): New.
* src/hwf-arm.c (arm_features): Add "sve".
* src/hwfeatures.c (hwflist): Add "arm-sve".
--

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
---
configure.ac | 50 ++++++++++++++++++++++++++++++++++++++++++++++++
doc/gcrypt.texi | 1 +
src/g10lib.h | 1 +
src/hwf-arm.c | 6 ++++++
src/hwfeatures.c | 1 +
5 files changed, 59 insertions(+)

diff --git a/configure.ac b/configure.ac
index 74150ae13c3c..b6c51ab9998d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -698,6 +698,14 @@ AC_ARG_ENABLE(arm-crypto-support,
armcryptosupport=$enableval,armcryptosupport=yes)
AC_MSG_RESULT($armcryptosupport)

+# Implementation of the --disable-sve-support switch.
+AC_MSG_CHECKING([whether SVE support is requested])
+AC_ARG_ENABLE(sve-support,
+ AS_HELP_STRING([--disable-sve-support],
+ [Disable support for the ARMv8 SVE instructions]),
+ svesupport=$enableval,svesupport=yes)
+AC_MSG_RESULT($svesupport)
+
# Implementation of the --disable-ppc-crypto-support switch.
AC_MSG_CHECKING([whether PPC crypto support is requested])
AC_ARG_ENABLE(ppc-crypto-support,
@@ -1321,6 +1329,7 @@ if test "$mpi_cpu_arch" != "arm" ; then
if test "$mpi_cpu_arch" != "aarch64" ; then
neonsupport="n/a"
armcryptosupport="n/a"
+ svesupport="n/a"
fi
fi

@@ -1974,6 +1983,35 @@ if test "$gcry_cv_gcc_inline_asm_aarch64_crypto" = "yes" ; then
fi


+#
+# Check whether GCC inline assembler supports AArch64 SVE instructions
+#
+AC_CACHE_CHECK([whether GCC inline assembler supports AArch64 SVE instructions],
+ [gcry_cv_gcc_inline_asm_aarch64_sve],
+ [.if test "$mpi_cpu_arch" != "aarch64" ||
+ test "$try_asm_modules" != "yes" ; then
+ gcry_cv_gcc_inline_asm_aarch64_sve="n/a"
+ else
+ gcry_cv_gcc_inline_asm_aarch64_sve=no
+ AC_LINK_IFELSE([.AC_LANG_PROGRAM(
+ [.[.__asm__(
+ ".cpu generic+simd+sve\n\t"
+ ".text\n\t"
+ "testfn:\n\t"
+ "mov x0, \#60;\n\t"
+ "whilelo p0.s, xzr, x0;\n\t"
+ "mov z0.s, p0/z, \#55;\n\t"
+ "ld1b {z0.b}, p0/z, [x1];\n\t"
+ );
+ ]], [ testfn(); ])],
+ [gcry_cv_gcc_inline_asm_aarch64_sve=yes])
+ fi])
+if test "$gcry_cv_gcc_inline_asm_aarch64_sve" = "yes" ; then
+ AC_DEFINE(HAVE_GCC_INLINE_ASM_AARCH64_SVE,1,
+ [Defined if inline assembler supports AArch64 SVE instructions])
+fi
+
+
#
# Check whether PowerPC AltiVec/VSX intrinsics
#
@@ -2462,6 +2500,13 @@ if test x"$armcryptosupport" = xyes ; then
fi
fi
fi
+if test x"$svesupport" = xyes ; then
+ if test "$gcry_cv_gcc_inline_asm_sve" != "yes" ; then
+ if test "$gcry_cv_gcc_inline_asm_aarch64_sve" != "yes" ; then
+ svesupport="no (unsupported by compiler)"
+ fi
+ fi
+fi

if test x"$aesnisupport" = xyes ; then
AC_DEFINE(ENABLE_AESNI_SUPPORT, 1,
@@ -2503,6 +2548,10 @@ if test x"$armcryptosupport" = xyes ; then
AC_DEFINE(ENABLE_ARM_CRYPTO_SUPPORT,1,
[Enable support for ARMv8 Crypto Extension instructions.])
fi
+if test x"$svesupport" = xyes ; then
+ AC_DEFINE(ENABLE_SVE_SUPPORT,1,
+ [Enable support for ARMv8 SVE instructions.])
+fi
if test x"$ppccryptosupport" = xyes ; then
AC_DEFINE(ENABLE_PPC_CRYPTO_SUPPORT,1,
[Enable support for POWER 8 (PowerISA 2.07) crypto extension.])
@@ -3385,6 +3434,7 @@ GCRY_MSG_SHOW([Try using Intel AVX512: ],[$avx512support])
GCRY_MSG_SHOW([Try using Intel GFNI: ],[$gfnisupport])
GCRY_MSG_SHOW([Try using ARM NEON: ],[$neonsupport])
GCRY_MSG_SHOW([Try using ARMv8 crypto: ],[$armcryptosupport])
+GCRY_MSG_SHOW([Try using ARMv8 SVE: ],[$svesupport])
GCRY_MSG_SHOW([Try using PPC crypto: ],[$ppccryptosupport])
GCRY_MSG_SHOW([],[])

diff --git a/doc/gcrypt.texi b/doc/gcrypt.texi
index b82535e236b8..5e07926bdaf0 100644
--- a/doc/gcrypt.texi
+++ b/doc/gcrypt.texi
@@ -601,6 +601,7 @@ are
@item arm-sm3
@item arm-sm4
@item arm-sha512
+@item arm-sve
@item ppc-vcrypto
@item ppc-arch_3_00
@item ppc-arch_2_07
diff --git a/src/g10lib.h b/src/g10lib.h
index a5bed0027eb1..91d53ff37d96 100644
--- a/src/g10lib.h
+++ b/src/g10lib.h
@@ -251,6 +251,7 @@ char **_gcry_strtokenize (const char *string, const char *delim);
#define HWF_ARM_SM3 (1 << 6)
#define HWF_ARM_SM4 (1 << 7)
#define HWF_ARM_SHA512 (1 << 8)
+#define HWF_ARM_SVE (1 << 9)

#elif defined(HAVE_CPU_ARCH_PPC)

diff --git a/src/hwf-arm.c b/src/hwf-arm.c
index a0205ee103d2..0bc2713b677f 100644
--- a/src/hwf-arm.c
+++ b/src/hwf-arm.c
@@ -153,6 +153,9 @@ static const struct feature_map_s arm_features[] =
#ifndef HWCAP_SHA512
# define HWCAP_SHA512 (1 << 21)
#endif
+#ifndef HWCAP_SVE
+# define HWCAP_SVE (1 << 22)
+#endif

static const struct feature_map_s arm_features[] =
{
@@ -168,6 +171,9 @@ static const struct feature_map_s arm_features[] =
{ HWCAP_SM3, 0, " sm3", HWF_ARM_SM3 },
{ HWCAP_SM4, 0, " sm4", HWF_ARM_SM4 },
{ HWCAP_SHA512, 0, " sha512", HWF_ARM_SHA512 },
+#endif
+#ifdef ENABLE_SVE_SUPPORT
+ { HWCAP_SVE, 0, " sve", HWF_ARM_SVE },
#endif
};

diff --git a/src/hwfeatures.c b/src/hwfeatures.c
index af5daf62134d..dec5efd3c196 100644
--- a/src/hwfeatures.c
+++ b/src/hwfeatures.c
@@ -74,6 +74,7 @@ static struct
{ HWF_ARM_SM3, "arm-sm3" },
{ HWF_ARM_SM4, "arm-sm4" },
{ HWF_ARM_SHA512, "arm-sha512" },
+ { HWF_ARM_SVE, "arm-sve" },
#elif defined(HAVE_CPU_ARCH_PPC)
{ HWF_PPC_VCRYPTO, "ppc-vcrypto" },
{ HWF_PPC_ARCH_3_00, "ppc-arch_3_00" },
--
2.24.3 (Apple Git-128)


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