Mailing List Archive

* configure.ac (gfnisupport, gcry_cv_gcc_inline_asm_gfni)
(ENABLE_GFNI_SUPPORT): New.
* src/g10lib.h (HWF_INTEL_GFNI): New.
* src/hwf-x86.c (detect_x86_gnuc): Add GFNI detection.
* src/hwfeatures.c (hwflist): Add "intel-gfni".
* doc/gcrypt.texi: Add "intel-gfni" to HW features list.
--

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
---
configure.ac | 43 +++++++++++++++++++++++++++++++++++++++++++
doc/gcrypt.texi | 1 +
src/g10lib.h | 1 +
src/hwf-x86.c | 7 ++++++-
src/hwfeatures.c | 1 +
5 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 3e415cea..15c92018 100644
--- a/configure.ac
+++ b/configure.ac
@@ -675,6 +675,14 @@ AC_ARG_ENABLE(avx512-support,
avx512support=$enableval,avx512support=yes)
AC_MSG_RESULT($avx512support)

+# Implementation of the --disable-gfni-support switch.
+AC_MSG_CHECKING([whether GFNI support is requested])
+AC_ARG_ENABLE(gfni-support,
+ AS_HELP_STRING([--disable-gfni-support],
+ [Disable support for the Intel GFNI instructions]),
+ gfnisupport=$enableval,gfnisupport=yes)
+AC_MSG_RESULT($gfnisupport)
+
# Implementation of the --disable-neon-support switch.
AC_MSG_CHECKING([whether NEON support is requested])
AC_ARG_ENABLE(neon-support,
@@ -1305,6 +1313,7 @@ if test "$mpi_cpu_arch" != "x86" ; then
avxsupport="n/a"
avx2support="n/a"
avx512support="n/a"
+ gfnisupport="n/a"
padlocksupport="n/a"
drngsupport="n/a"
fi
@@ -1606,6 +1615,30 @@ if test "$gcry_cv_gcc_inline_asm_vaes_vpclmul" = "yes" ; then
fi


+#
+# Check whether GCC inline assembler supports GFNI instructions
+#
+AC_CACHE_CHECK([whether GCC inline assembler supports GFNI instructions],
+ [gcry_cv_gcc_inline_asm_gfni],
+ [.if test "$mpi_cpu_arch" != "x86" ||
+ test "$try_asm_modules" != "yes" ; then
+ gcry_cv_gcc_inline_asm_gfni="n/a"
+ else
+ gcry_cv_gcc_inline_asm_gfni=no
+ AC_LINK_IFELSE([.AC_LANG_PROGRAM(
+ [.[.void a(void) {
+ __asm__("gf2p8affineqb \$123, %%xmm0, %%xmm0;\n\t":::"cc"); /* SSE */
+ __asm__("vgf2p8affineinvqb \$234, %%ymm1, %%ymm1, %%ymm1;\n\t":::"cc"); /* AVX */
+ __asm__("vgf2p8mulb (%%eax), %%zmm2, %%zmm2;\n\t":::"cc"); /* AVX512 */
+ }]], [ a(); ] )],
+ [gcry_cv_gcc_inline_asm_gfni=yes])
+ fi])
+if test "$gcry_cv_gcc_inline_asm_gfni" = "yes" ; then
+ AC_DEFINE(HAVE_GCC_INLINE_ASM_GFNI,1,
+ [Defined if inline assembler supports GFNI instructions])
+fi
+
+
#
# Check whether GCC inline assembler supports BMI2 instructions
#
@@ -2411,6 +2444,11 @@ if test x"$avx512support" = xyes ; then
avx512support="no (unsupported by compiler)"
fi
fi
+if test x"$gfnisupport" = xyes ; then
+ if test "$gcry_cv_gcc_inline_asm_gfni" != "yes" ; then
+ gfnisupport="no (unsupported by compiler)"
+ fi
+fi
if test x"$neonsupport" = xyes ; then
if test "$gcry_cv_gcc_inline_asm_neon" != "yes" ; then
if test "$gcry_cv_gcc_inline_asm_aarch64_neon" != "yes" ; then
@@ -2454,6 +2492,10 @@ if test x"$avx512support" = xyes ; then
AC_DEFINE(ENABLE_AVX512_SUPPORT,1,
[Enable support for Intel AVX512 instructions.])
fi
+if test x"$gfnisupport" = xyes ; then
+ AC_DEFINE(ENABLE_GFNI_SUPPORT,1,
+ [Enable support for Intel GFNI instructions.])
+fi
if test x"$neonsupport" = xyes ; then
AC_DEFINE(ENABLE_NEON_SUPPORT,1,
[Enable support for ARM NEON instructions.])
@@ -3318,6 +3360,7 @@ GCRY_MSG_SHOW([Try using DRNG (RDRAND): ],[$drngsupport])
GCRY_MSG_SHOW([Try using Intel AVX: ],[$avxsupport])
GCRY_MSG_SHOW([Try using Intel AVX2: ],[$avx2support])
GCRY_MSG_SHOW([Try using Intel AVX512: ],[$avx512support])
+GCRY_MSG_SHOW([Try using Intel GFNI: ],[$gfnisupport])
GCRY_MSG_SHOW([Try using ARM NEON: ],[$neonsupport])
GCRY_MSG_SHOW([Try using ARMv8 crypto: ],[$armcryptosupport])
GCRY_MSG_SHOW([Try using PPC crypto: ],[$ppccryptosupport])
diff --git a/doc/gcrypt.texi b/doc/gcrypt.texi
index 55515011..b82535e2 100644
--- a/doc/gcrypt.texi
+++ b/doc/gcrypt.texi
@@ -591,6 +591,7 @@ are
@item intel-shaext
@item intel-vaes-vpclmul
@item intel-avx512
+@item intel-gfni
@item arm-neon
@item arm-aes
@item arm-sha1
diff --git a/src/g10lib.h b/src/g10lib.h
index c07ed788..a5bed002 100644
--- a/src/g10lib.h
+++ b/src/g10lib.h
@@ -238,6 +238,7 @@ char **_gcry_strtokenize (const char *string, const char *delim);
#define HWF_INTEL_SHAEXT (1 << 16)
#define HWF_INTEL_VAES_VPCLMUL (1 << 17)
#define HWF_INTEL_AVX512 (1 << 18)
+#define HWF_INTEL_GFNI (1 << 19)

#elif defined(HAVE_CPU_ARCH_ARM)

diff --git a/src/hwf-x86.c b/src/hwf-x86.c
index 33386070..20420798 100644
--- a/src/hwf-x86.c
+++ b/src/hwf-x86.c
@@ -403,7 +403,7 @@ detect_x86_gnuc (void)

#if defined(ENABLE_AVX2_SUPPORT) && defined(ENABLE_AESNI_SUPPORT) && \
defined(ENABLE_PCLMUL_SUPPORT)
- /* Test bit 9 for VAES and bit 10 for VPCLMULDQD */
+ /* Test features2 bit 9 for VAES and features2 bit 10 for VPCLMULDQD */
if ((features2 & 0x00000200) && (features2 & 0x00000400))
result |= HWF_INTEL_VAES_VPCLMUL;
#endif
@@ -439,6 +439,11 @@ detect_x86_gnuc (void)
&& (features2 & (1 << 14)))
result |= HWF_INTEL_AVX512;
#endif
+
+ /* Test features2 bit 6 for GFNI (Galois field new instructions).
+ * These instructions are available for SSE/AVX/AVX2/AVX512. */
+ if (features2 & (1 << 6))
+ result |= HWF_INTEL_GFNI;
}

return result;
diff --git a/src/hwfeatures.c b/src/hwfeatures.c
index 8e92cbdd..af5daf62 100644
--- a/src/hwfeatures.c
+++ b/src/hwfeatures.c
@@ -63,6 +63,7 @@ static struct
{ HWF_INTEL_SHAEXT, "intel-shaext" },
{ HWF_INTEL_VAES_VPCLMUL, "intel-vaes-vpclmul" },
{ HWF_INTEL_AVX512, "intel-avx512" },
+ { HWF_INTEL_GFNI, "intel-gfni" },
#elif defined(HAVE_CPU_ARCH_ARM)
{ HWF_ARM_NEON, "arm-neon" },
{ HWF_ARM_AES, "arm-aes" },
--
2.34.1


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